Abstract: The embodiments of the present disclosure relate to the field of display technology, and in particular to a display substrate, a display panel, and a display device. The display substrate includes a first electrode, a first wire, and a second wire; the first electrode is provided with a plurality of slits; the first wire is provided on a side of the first electrode, and a first gap is provided between the first wire and the first electrode, and the first wire being electrically connected to the first electrode; a second wire provided on a side of the first electrode away from the first wire, and a second gap being provided between the second wire and the first electrode; wherein each of the slits is provided with a first end and a second end opposed to each other, and the first end is close to the first wire, and the second end is close to the second wire, and a light-transmitting part of the first end is larger than a light-transmitting part of the second end.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a first substrate and a second substrate arranged opposite to each other, and a first spacer located between the first substrate and the second substrate, both ends of the first spacer are in contact with the first substrate and the second substrate respectively; a surface of the first substrate close to the second substrate includes a recess, and an end of the first spacer in contact with the first substrate is embedded in the recess.

Abstract: A display substrate includes: a base, a plurality of pixel units arranged in columns in a first direction and in rows in a second direction, a plurality of data lines and first gate lines extending in the first direction, a plurality of second gate lines extending in the second direction, and at least one gate driver circuit connected to the first gate lines and located at a side of the display substrate parallel to the second direction. One pixel unit includes a TFT. The TFT is connected to one data line. In a column of pixel units, TFTs of any two adjacent pixel units are respectively located at first and second sides of a respective data line. Each second gate line is connected to a row of pixel units and at least one of the first gate lines. First gate lines connecting different second gate lines are different.

Abstract: A display substrate, a display panel and a display apparatus. The display substrate including: a substrate having a display area; a plurality of sub-pixels arranged in an array and located in the display area of the substrate; and a plurality of data lines arranged in the display area of the substrate; the plurality of data lines extend in a column direction of the sub-pixels, and a column of sub-pixels are electrically connected with at least one of the plurality of data lines; and for at least one of the plurality of data lines, a side of an orthographic projection of the at least one of the plurality of data lines on the substrate facing orthographic projections of sub-pixels electrically connected with the at least one of the plurality of data lines has a plurality of first concave-convex structures.

Abstract: A display panel has a plurality of sub-pixel regions arranged in an array of a plurality of rows and a plurality of columns, and a light-shielding region that separates the sub-pixel regions and surrounds all the sub-pixel regions as a whole. The display panel includes: a first substrate; a light-shielding pattern layer located on the first substrate, the light-shielding pattern layer being located in the light-shielding region and covering part of the light-shielding region; a second substrate disposed opposite to the first substrate; and a light-shielding structure layer located on the second substrate, the light-shielding structure layer covering at least a region of the light-shielding region that is not covered by the light-shielding pattern layer.

Abstract: A display panel having an active area includes: an array substrate and an opposite substrate disposed opposite to the array substrate. The array substrate includes a first substrate and a conductive structure disposed on the first substrate. The conductive structure is located on a side of the active area. On a side of the conductive structure away from the active area, a side surface of the conductive structure is substantially flush with a side surface of the first substrate. On the side where the conductive structure is located, an edge of an orthographic projection of the opposite substrate on a plane where the array substrate is located is located outside an edge of the array substrate.

Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixels arranged in an array; gate line light shielding parts extending in a row direction are arranged on horizontal non-display areas between every two adjacent rows of sub-pixels; vertical non-display areas are arranged between every two sub-pixels adjacent in a row direction; at least one of the vertical non-display areas is provided with a vertical light shielding part, and the vertical light shielding part is configured to prevent two sub-pixels on two sides, in the row direction, of the vertical light shielding part from light leakage at a junction; and a gap is formed between the vertical light shielding part and each of two gate line light shielding parts adjacent to the vertical light shielding part.

Abstract: A display panel and a display device are disclosed. The display panel includes a plurality of sub-pixels arranged in an array; gate line light shielding parts extending in a row direction are arranged on horizontal non-display areas between every two adjacent rows of sub-pixels; vertical non-display areas are arranged between every two sub-pixels adjacent in a row direction; at least one of the vertical non-display areas is provided with a vertical light shielding part, and the vertical light shielding part is configured to prevent two sub-pixels on two sides, in the row direction, of the vertical light shielding part from light leakage at a junction; and a gap is formed between the vertical light shielding part and each of two gate line light shielding parts adjacent to the vertical light shielding part.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a first substrate and a second substrate arranged opposite to each other, and a first spacer located between the first substrate and the second substrate, both ends of the first spacer are in contact with the first substrate and the second substrate respectively; a surface of the first substrate close to the second substrate includes a recess, and an end of the first spacer in contact with the first substrate is embedded in the recess.

Abstract: The embodiments of the present disclosure relate to the field of display technology, and in particular to a display substrate, a display panel, and a display device. The display substrate includes a first electrode, a first wire, and a second wire; the first electrode is provided with a plurality of slits; the first wire is provided on a side of the first electrode, and a first gap is provided between the first wire and the first electrode, and the first wire being electrically connected to the first electrode; a second wire provided on a side of the first electrode away from the first wire, and a second gap being provided between the second wire and the first electrode; wherein each of the slits is provided with a first end and a second end opposed to each other, and the first end is close to the first wire, and the second end is close to the second wire, and a light-transmitting part of the first end is larger than a light-transmitting part of the second end.

Abstract: A display substrate includes: a base, a plurality of pixel units arranged in columns in a first direction and in rows in a second direction, a plurality of data lines and first gate lines extending in the first direction, a plurality of second gate lines extending in the second direction, and at least one gate driver circuit connected to the first gate lines and located at a side of the display substrate parallel to the second direction. One pixel unit includes a TFT. The TFT is connected to one data line. In a column of pixel units, TFTs of any two adjacent pixel units are respectively located at first and second sides of a respective data line. Each second gate line is connected to a row of pixel units and at least one of the first gate lines. First gate lines connecting different second gate lines are different.

Abstract: A shift register unit, a method of driving a shift register unit, a gate driving circuit, and a display device are disclosed. The shift register unit includes an input circuit and an output circuit. The input circuit is configured to write an input signal of the input terminal to the first node in response to an input control signal, so as to control a level of the first node. The output circuit is configured to receive a clock signal of the clock signal terminal and output a scanning signal through the pixel signal output terminal under control of the level of the first node. The output circuit includes a variable resistor, and the variable resistor is configured to adjust a level of the scanning signal according to a resistance value of the variable resistor.

Abstract: A shift register unit, a method of driving a shift register unit, a gate driving circuit, and a display device are disclosed. The shift register unit includes an input circuit and an output circuit. The input circuit is configured to write an input signal of the input terminal to the first node in response to an input control signal, so as to control a level of the first node. The output circuit is configured to receive a clock signal of the clock signal terminal and output a scanning signal through the pixel signal output terminal under control of the level of the first node. The output circuit includes a variable resistor, and the variable resistor is configured to adjust a level of the scanning signal according to a resistance value of the variable resistor.