Patents by Inventor Beom Cho

Beom Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080057329
    Abstract: There is provided a ceramic sheet product having a binder layer separately formed in a lower portion thereof to increase stackability and to reduce generation of pores after binder burnout, and a method thereof. The ceramic sheet product includes a binder layer formed of a binder resin; and a ceramic green sheet form on the binder layer. This reduces an amount of high polymer binder in a ceramic slurry, increasing a ceramic powder fraction. Due to such a high density of the green sheet, the number of pores formed after the binder burnout is very small, which decreases volume shrinkage and increases density.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 6, 2008
    Inventor: Beom Cho
  • Publication number: 20080038885
    Abstract: A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
    Type: Application
    Filed: August 24, 2007
    Publication date: February 14, 2008
    Inventors: Je Lee, Yang Bae, Beom Cho, Chang Jeong
  • Publication number: 20060065892
    Abstract: A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 30, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je Lee, Yang Bae, Beom Cho, Chang Jeong