Abstract: A digital signal processing circuit includes an analog gain compensator that compensates for an analog gain of a baseband signal including a plurality of component carriers (CCs) to output a compensated baseband signal; an analog-to-digital converter (ADC) that converts the compensated baseband signal into a first digital signal; a plurality of filtering circuits that generate a second digital signal from the first digital signal; and a control circuit. Each filtering circuit sequentially filters the first digital signal so that a corresponding one of the second digital signals retains one CC among the CCs, compensates for a digital gain, and a performs down-sampling. The control circuit generates an analog gain control signal for controlling the analog gain based on the second digital signals and a digital gain control signal for controlling the digital gain.

Abstract: A semiconductor device includes a first ADC configured to sample an input signal based on a first clock signal, quantize the input signal with a first gain, and output a plurality of first output signals, and a second ADC configured to sample the input signal based on a second clock signal obtained by delaying the first clock signal, quantize the input signal with a second gain, and output a plurality of second output signals. The device includes a gain mismatch estimator configured to calculate first and second values which are averages of absolute values of the first output signals and the second output signals, and calculate first and second gain correction values using the first and second values. A gain mismatch compensator is configured to output a plurality of corrected first output signals and corrected second output signals, according to the first and second gain correction values.

Abstract: A communication device and a method of controlling the same. The communication device includes at least one receiver configured to connect to a first antenna for receiving a first signal and a second antenna for receiving a second signal; and a processor electrically coupled to the at least one receiver, wherein the processor is configured to measure received signal strengths of the first signal and the second signal based on calibration operation for the first antenna and the second antenna, select one of the first antenna and the second antenna based on the measured received signal strengths, and control the at least one receiver to receive a signal through the selected one of the first antenna and the second antenna.

Abstract: A communication device and a method of controlling the same. The communication device includes at least one receiver configured to connect to a first antenna for receiving a first signal and a second antenna for receiving a second signal; and a processor electrically coupled to the at least one receiver, wherein the processor is configured to measure received signal strengths of the first signal and the second signal based on calibration operation for the first antenna and the second antenna, select one of the first antenna and the second antenna based on the measured received signal strengths, and control the at least one receiver to receive a signal through the selected one of the first antenna and the second antenna.

Abstract: A method and a terminal are provided for use in a communication system. The method includes determining an average power from power obtained in a measurement section of a data symbol in a time slot including an updated gain section and a maintained gain section, the measurement section starting after a last gain is applied in the data symbol and ending before a mid-amble of the time slot is buffered, determining an average error power from a difference between a predetermined target power and the average power, and determining an output power by adding the average error power to power that is received over the time slot.

Abstract: A method and a terminal are provided for use in a communication system. The method includes determining an average power from power obtained in a measurement section of a data symbol in a time slot including an updated gain section and a maintained gain section, the measurement section starting after a last gain is applied in the data symbol and ending before a mid-amble of the time slot is buffered, determining an average error power from a difference between a predetermined target power and the average power, and determining an output power by adding the average error power to power that is received over the time slot.

Abstract: Provided is a receiver for processing VSB signal. The receiver includes a first equalizer/decoder unit and a second equalizer/decoder unit. The first equalizer/decoder unit performs a first equalizing operation, first TCM decoding and first RS decoding on a received symbol to output a first dibit. The second equalizer/decoder unit performs a second equalizing operation, second TCM decoding and second RS decoding on the received symbol to output a transport stream. The first dibit is provided as a priori information for a soft-decision operation of the second TCM decoding.

Abstract: A symbol sequence corresponding to a vestigial sideband (VSB) signal is divided into a plurality of sections, respective ones of which correspond to respective time periods. Individual ones of the sections are recursively adaptively equalized to produce respective equalized sections. A bit stream is constructed from the equalized sections.

Abstract: A diversity receiver configured to receive digital signals, including a first modulator configured to receive a first signal and modulate the first signal to first data, a second modulator configured to receive a second signal and modulate the second signal to second data, a path aligner configured to detect starting points of the first data and the second data and generate a control signal for synchronizing the first data and the second data, and an equalizer/decoder configured to synchronize the first and second data and to generate a signal to noise ratio and an equalizer output by a recursive equalization operation for the diversity signals thus synchronized.

Abstract: A diversity receiver configured to receive digital signals, including a first modulator configured to receive a first signal and modulate the first signal to first data, a second modulator configured to receive a second signal and modulate the second signal to second data, a path aligner configured to detect starting points of the first data and the second data and generate a control signal for synchronizing the first data and the second data, and an equalizer/decoder configured to synchronize the first and second data and to generate a signal to noise ratio and an equalizer output by a recursive equalization operation for the diversity signals thus synchronized.

Abstract: A symbol sequence corresponding to a vestigial sideband (VSB) signal is divided into a plurality of sections, respective ones of which correspond to respective time periods. Individual ones of the sections are recursively adaptively equalized to produce respective equalized sections. A bit stream is constructed from the equalized sections.

Abstract: Provided is a receiver for processing VSB signal. The receiver includes a first equalizer/decoder unit and a second equalizer/decoder unit. The first equalizer/decoder unit performs a first equalizing operation, first TCM decoding and first RS decoding on a received symbol to output a first dibit. The second equalizer/decoder unit performs a second equalizing operation, second TCM decoding and second RS decoding on the received symbol to output a transport stream. The first dibit is provided as a priori information for a soft-decision operation of the second TCM decoding.

Abstract: An apparatus for estimating a timing offset of each of orthogonal frequency division multiplexing (OFDM) symbols that are fast Fourier transform (FFT)-processed. A first correlator calculates correlation values and outputs a first correlation signal. A second correlator calculates correlation values and outputs a second correlation signal. A third correlator calculates a correlation value and outputs a third correlation signal. A delay correlator calculates a correlation value and outputs a timing offset information signal. A phase estimator detects phase components of the timing offset information signal and a sliding integrator accumulates the detected phase components of the timing offset information signal during a symbol interval and outputs an average value of the accumulated phase components during the symbol interval as the timing offset of each OFDM symbol.

Abstract: A ATSC compliant digital television (DTV) receiver including an image rejection filter, an interpolator, a numerically controlled oscillator (NCO), a matched filter unit, a frequency converter, and a DC remover. The image rejection filter removes (filters out) an unwanted image signal and an adjacent channel's interference signal from a first intermediate frequency (IF) signal sampled at a first sampling frequency. The interpolator resamples (at a second sampling frequency) a signal output from the image rejection filter and compensates for a predetermined symbol timing offset in response to a first control signal, thereby outputting a second IF signal. The NCO down converts the second IF signal and simultaneously compensates for a predetermined carrier offset in response to a second control signal, thereby outputting a first complex signal. The matched filter unit receives the first complex signal and filters the first complex signal, thereby outputting a second complex signal.

Abstract: A method for demodulating a carrier wave in a channel environment in which a pilot signal may be distorted, in a digital TV receiver, which may receive a vestigial sideband (VSB) modulated and transmitted signal, and a demodulation apparatus therefor are provided. A field synchronization part of a VSB signal, in which a pilot signal may be removed, may be used as a reference signal for synchronization. The frequency offset of a carrier wave may be estimated through self-correlation of a signal, and the phase offset of the carrier wave may be estimated through a pilot-less frequency and phase locked loop (FPLL).

Abstract: An apparatus may include a sort circuit for receiving first and second baseband signals, where the sort circuit shifting frequencies of the first and second baseband signals. The apparatus may also include a removal circuit for receiving the shifted first and second baseband signals and for combining the shifted first and second baseband signals to provide a frequency-modulated signal, and a symbol timing restoration circuit for measuring a timing error in related symbols of the frequency-modulated signal, for generating an address selection signal that is proportional to the timing error, in response to a carrier restoration signal, and for indicating restoration of the carrier.

Abstract: An apparatus for estimating a timing offset of each of orthogonal frequency division multiplexing (OFDM) symbols that are fast Fourier transform (FFT)-processed. A first correlator calculates correlation values and outputs a first correlation signal. A second correlator calculates correlation values and outputs a second correlation signal. A third correlator calculates a correlation value and outputs a third correlation signal. A delay correlator calculates a correlation value and outputs a timing offset information signal. A phase estimator detects phase components of the timing offset information signal and a sliding integrator accumulates the detected phase components of the timing offset information signal during a symbol interval and outputs an average value of the accumulated phase components during the symbol interval as the timing offset of each OFDM symbol.

Abstract: A ATSC compliant digital television (DTV) receiver. including an image rejection filter, an interpolator, a numerically controlled oscillator (NCO), a matched filter unit, a frequency converter, and a DC remover. The image rejection filter removes (filters out) an unwanted image signal and an adjacent channel's interference signal from a first intermediate frequency (IF) signal sampled at a first sampling frequency. The interpolator resamples (at a second sampling frequency) a signal output from the image rejection filter and compensates for a predetermined symbol timing offset in response to a first control signal, thereby outputting a second IF signal. The NCO down converts the second IF signal and simultaneously compensates for a predetermined carrier offset in response to a second control signal, thereby outputting a first complex signal. The matched filter unit receives the first complex signal and filters the first complex signal, thereby outputting a second complex signal.

Abstract: Method and apparatus for use with digital television receivers are included among the embodiments. In exemplary systems, components of an interfering analog television signal (e.g., an NTSC signal) in the same channel as a DTV signal are separately estimated and canceled from the DTV signal. For instance, separate frequency shifters produce shifted versions of the DTV signal, each shifter placing one interfering NTSC carrier signal at or near DC. A DC detector detects the NTSC carrier strength for each carrier, and carrier cancellation signals are synthesized based on these measured carrier strengths. This rejection filter is simpler than prior art filters that require phase-lock on the interfering carriers, and also allows the filter to operate when phase-lock on interfering carriers is difficult to obtain. Other embodiments are described and claimed.

Abstract: A method for demodulating a carrier wave in a channel environment in which a pilot signal may be distorted, in a digital TV receiver, which may receive a vestigial sideband (VSB) modulated and transmitted signal, and a demodulation apparatus therefor are provided. A field synchronization part of a VSB signal, in which a pilot signal may be removed, may be used as a reference signal for synchronization. The frequency offset of a carrier wave may be estimated through self-correlation of a signal, and the phase offset of the carrier wave may be estimated through a pilot-less frequency and phase locked loop (FPLL).

Abstract: A multi-sprinkler controller includes a timer-activated motor which drives a rotor disc. The rotor disc operates the opening and closing of several water passages through which water is supplied to the various sprinklers which make up a sprinkler system.