Abstract: In some embodiments, a circuit includes a first amplifier, a second amplifier, and a counter. The first amplifier operates based on a first power supply voltage and generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array during a first operation period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array during a second operation period. The second amplifier operates based on the first power supply voltage, generates a second output signal based on the first output signal and adjust a voltage level of the second output signal from a low level to a third level. The counter operates based on a second power supply voltage, counts pulses of the second output signal, and outputs a counting result as a digital signal.

Abstract: An image sensor is provided. The image sensor includes a counting code generator configured to generate a counting code, a pixel array including at least one pixel, a correlated double sampling (CDS) circuit configured to compare a magnitude of a pixel signal output from the at least one pixel with a magnitude of a ramp signal and to output a corresponding comparison signal, a pulse generator configured to generate a pulse signal synchronized with a first clock signal based on the comparison signal, and a counter circuit configured to latch a value of the counting code to correspond to a transition of a level of the comparison signal based on the pulse signal.

Abstract: An image sensor is provided. The image sensor includes a counting code generator configured to generate a counting code, a pixel array including at least one pixel, a correlated double sampling (CDS) circuit configured to compare a magnitude of a pixel signal output from the at least one pixel with a magnitude of a ramp signal and to output a corresponding comparison signal, a pulse generator configured to generate a pulse signal synchronized with a first clock signal based on the comparison signal, and a counter circuit configured to latch a value of the counting code to correspond to a transition of a level of the comparison signal based on the pulse signal.