Beomsup Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
Abstract: The present invention relates to a ring oscillator VCO using a differential delay stage, substantially increasing the oscillation frequency. The differential delay stage utilizes a differential latch together with a pair of PMOS transistors taking the input signals through skewed delay paths. The added control NMOS transistors controls the strength of said latch and makes the ring oscillator variable in oscillation frequency.
Abstract: Disclosed is a self-calibration device for calibrating a phase difference between output waveforms of a ring oscillator, comprising: a voltage-controlled oscillator adapted to adjust the transition time of an output signal according to an inputting of a control voltage for controlling the phase offset and generate the adjusted output signal; a divider adapted to divide a frequency of the output signal generated from the voltage-controlled oscillator by a fractional number to generate a plurality of output waveforms having different phases with them having an identical phase difference each other; a phase-locked loop (PLL) circuit adapted to correctly make a frequency and phase of the output signal of the divider coincident with those of a system clock, the phase-locked loop (PLL) circuit including at least a phase-frequency detecting means adapted to compare the frequency and phase of the output signal with those of the system clock and to output a result of the comparison; and a phase offset calibrating loop
Abstract: A low-power sense amplifier for a memory is provided, which includes a differential amplifier for sensing and amplifying a weak voltage signal of a bit line connected to a memory cell, and a latch amplifier for storing data inputted thereto, the latch amplifier being operated by the output signal of the differential amplifier, the sense amplifier including a bias means constructed of transistors which are included in the differential amplifier and turned on or turned off by a control signal, the transistors providing a load resistor component required for driving the differential amplifier when it is turned on, and a cutoff means for turning off the transistors constructing the bias means to stop the operation of the differential amplifier when there is a first logic state signal among the output signals of the latch amplifier. Accordingly, the low-power sense amplifier for a memory can perform high-speed sense amplification of bit line signal and prevent unnecessary power consumption.
June 21, 1999
Date of Patent:
May 29, 2001
Korea Advanced Institute of Science and Technology
Abstract: A data communication receiver includes conventional means for receiving and demodulating a synchronous pulse amplitude modulated signal to provide baseband I and Q signals. A pair of absolute value generators process the baseband I and Q signals to provide absolute value I and Q signals which are combined to form a combined I and Q signal. The combined I and Q signal is applied to a third absolute value generator, the output of which is filtered by a baud rate or higher rate with a low order filter to produce a recovered clock signal.
January 26, 1996
Date of Patent:
September 1, 1998
Philips Electronics North America Corporation