Patents by Inventor Bernard Arambepola

Bernard Arambepola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10341046
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: July 2, 2019
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20190182532
    Abstract: The disclosure generally relates to a method and system for fast channel scan for DOCSIS cable modems. The disclosed exemplary embodiments are directed to hybrid fiber coaxial (HFC) modems and may be equally applied to other type of modems both wired and wireless. The disclosed embodiments enable locating the Physical Link Layer Chanel (PLC) quickly by using a beacon channel at a designated frequency offset from the PLC.
    Type: Application
    Filed: November 9, 2018
    Publication date: June 13, 2019
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Ziv Kfir
  • Publication number: 20190173609
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: October 31, 2018
    Publication date: June 6, 2019
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 10305714
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 10171272
    Abstract: An inter-carrier interference (ICI) mitigation circuit associated with an orthogonal frequency division multiplexing (OFDM) receiver is disclosed. The ICI mitigation circuit comprises an ICI cancellation circuit configured to receive an OFDM symbol associated with an OFDM signal and determine an ICI associated with one or more OFDM subcarriers within the OFDM symbol. The ICI cancellation circuit is further configured to cancel the ICI from the one or more OFDM subcarriers associated with the OFDM symbol, in order to generate a desired OFDM symbol. In some embodiments, the ICI is determined and cancelled at the ICI cancellation circuit, in accordance with a predetermined ICI mitigation algorithm.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: Thushara Hewavithana, Bernard Arambepola
  • Patent number: 10158451
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: December 18, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20180316523
    Abstract: An inter-carrier interference (ICI) mitigation circuit associated with an orthogonal frequency division multiplexing (OFDM) receiver is disclosed. The ICI mitigation circuit comprises an ICI cancellation circuit configured to receive an OFDM symbol associated with an OFDM signal and determine an ICI associated with one or more OFDM subcarriers within the OFDM symbol. The ICI cancellation circuit is further configured to cancel the ICI from the one or more OFDM subcarriers associated with the OFDM symbol, in order to generate a desired OFDM symbol. In some embodiments, the ICI is determined and cancelled at the ICI cancellation circuit, in accordance with a predetermined ICI mitigation algorithm.
    Type: Application
    Filed: June 30, 2017
    Publication date: November 1, 2018
    Inventors: Thushara Hewavithana, Bernard Arambepola
  • Publication number: 20180287770
    Abstract: A head-end equipment associated with a communication system configured to interface with an interference group (IG) composed of two or more modems is disclosed. The head-end equipment comprises a memory configured to store a plurality of instructions; and one or more processors configured to retrieve the plurality of instructions from the memory. In some embodiments, the one or more processors, upon execution of the plurality of instructions from the memory, is configured to generate an advanced warning signal to be provided to one or more modems associated with the IG. In some embodiments, the advanced warning signal comprises an information that a select modem, different from the one or more modems, in the IG will be initiating an upstream communication in a select frequency band, as well as information on a start time and a duration of the upstream communication.
    Type: Application
    Filed: February 28, 2018
    Publication date: October 4, 2018
    Inventors: David Barr, Bernard Arambepola
  • Publication number: 20180287660
    Abstract: A cable modem system for discovering interference groups (IGs) includes an infrastructure and a cable modem termination system (CMTS). The infrastructure is for transferring data. The CMTS is configured to initiate generation of test signals by a set of cable modems (CMs), obtain a set of test measurements for the set of CMs, discover interference groups (IGs) of the set of CMs based on the obtained set of test measurements and assign a plurality of upstream and downstream channels for the set of CMs that use orthogonal frequency division multiplexing (OFDM) based on the discovered IGs.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Bernard Arambepola, Thushara Hewavithana, Noam Tal, Shaul Shulman
  • Publication number: 20180287842
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Application
    Filed: January 29, 2018
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 9954708
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 9954712
    Abstract: Methods and architectures for blind detection of physical layer control (PLC) signaling for transmitters and receivers having respective misaligned inverse fast Fourier transforms (IFFTs) and (FFTs) includes opening a frequency tracking offset calibration circuit, estimating or calculating a phase discontinuity due to FFT misalignment, closing the frequency tracking offset calibration circuit and applying a frequency correction that includes a frequency offset less the calculated or estimated phase discontinuity.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Sahan S. Gamage, Shaul Shulman
  • Publication number: 20180048417
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20170272201
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: April 5, 2017
    Publication date: September 21, 2017
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9742610
    Abstract: One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: August 22, 2017
    Assignee: INTEL CORPORATION
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana
  • Patent number: 9634795
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9515687
    Abstract: Apparatus and methods are described to perform inter carrier interference (ICI) reduction or cancellation in an orthogonal frequency domain multiplexing (OFDM) receiver. A first and a second stage of ICI cancellation may be performed before inputting an estimated transmitted data carrier for forward error correction. Forward error correction may include a signal re-correction and reconstruction of the estimated transmitted data carrier prior to a further stage of ICI cancellation.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Thushara Hewavithana, Parveen K. Shukla, Bernard Arambepola
  • Publication number: 20160285664
    Abstract: One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.
    Type: Application
    Filed: March 14, 2016
    Publication date: September 29, 2016
    Applicant: Intel Corporation
    Inventors: BERNARD ARAMBEPOLA, PARVEEN K. SHUKLA, THUSHARA HEWAVITHANA
  • Publication number: 20160205430
    Abstract: The disclosure generally relates to a method and system for fast channel scan for DOCSIS cable modems. The disclosed exemplary embodiments are directed to hybrid fiber coaxial (HFC) modems and may be equally applied to other type of modems both wired and wireless. The disclosed embodiments enable locating the Physical Link Layer Channel (PLC) quickly by using a beacon channel at a designated frequency offset from the PLC.
    Type: Application
    Filed: January 8, 2015
    Publication date: July 14, 2016
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Ziv Kfir
  • Patent number: 9385905
    Abstract: Block-based interleaving to process a block of sub-carriers as a two-dimensional array defined by a frequency dimension and a time dimension. For each symbol of the array a cell is selected at each frequency index of the array in a diagonal wrap-around fashion. The array may be traversed with a modulo-based index computed as a function of an incrementing frequency index, a symbol index, and a modulus defined by a depth of the array. Cells may be selected as indicated by the frequency and time indices, and/or as indicated by a bit-reversed representation of the frequency index and/or the time index. A block interleaver may be configured to time interleave without impacting frequency, or interleave in time and frequency. Frequency interleaving may performed with the bit-reversed representation of the frequency index.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: July 5, 2016
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana