Patents by Inventor Bernard Guay

Bernard Guay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10333758
    Abstract: Methods and systems are provided for converting wideband signals. In an example system, a wideband signal that includes one or more narrowband signals may be received and handled, with the handling may include selecting a subset of signal processing circuits, from a plurality of signal processing circuits in the system, with the number of selected signal processing circuits being less than the total number of signal processing circuits in the system. Only the selected signal processing circuits are then enabled, such that all remaining signal processing circuits are not enabled. Signal processing adjustment may then be applied, via the subset of signal processing circuits, only to the one or more narrowband signals, such that a remainder of the wideband signal is not adjusted. The handling of the received wideband signal may include separating the one or more narrowband signals from the wideband signal.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: June 25, 2019
    Assignee: MAXLINEAR ASIA SINGAPORE PTE LTD.
    Inventors: Ryan Santa, Bernard Guay
  • Publication number: 20180270097
    Abstract: Methods and systems are provided for converting wideband signals. In an example system, a wideband signal that includes one or more narrowband signals may be received and handled, with the handling may include selecting a subset of signal processing circuits, from a plurality of signal processing circuits in the system, with the number of selected signal processing circuits being less than the total number of signal processing circuits in the system. Only the selected signal processing circuits are then enabled, such that all remaining signal processing circuits are not enabled. Signal processing adjustment may then be applied, via the subset of signal processing circuits, only to the one or more narrowband signals, such that a remainder of the wideband signal is not adjusted. The handling of the received wideband signal may include separating the one or more narrowband signals from the wideband signal.
    Type: Application
    Filed: February 6, 2018
    Publication date: September 20, 2018
    Inventors: Ryan Santa, Bernard Guay
  • Patent number: 9887866
    Abstract: Methods and systems are provided for converting wideband analog radio frequency (RF) signals. In an implementation, a first wideband analog RF signal may be received and handled. The first wideband analog RF signal comprises one or more first narrowband analog RF signals, with a total of bandwidths of the one or more first narrowband analog RF signals is less than a total bandwidth of the first wideband analog RF signal. Handling the first wideband analog RF signal may including selecting a first subset of analog-to-digital converters (ADCs) from a plurality of analog-to-digital converters (ADCs), with the number of ADCs in the first subset of ADCs being less than a total number of ADCs in the plurality of ADCs, and only the first subset of ADCs may be enabled. Only the one or more first narrowband analog RF signals may be analog-to-digital converted via the first subset of ADCs.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: February 6, 2018
    Assignee: MAXLINEAR ASIA SINGAPORE PTE LTD.
    Inventors: Ryan Santa, Bernard Guay
  • Publication number: 20170118059
    Abstract: A method and system are provided for converting wideband analog radio frequency (RF) signals to a digital domain. In an implementation, the system comprises: an amplifier for receiving and amplifying a first wideband analog RF signal comprising one or more first narrowband analog RF signals, each first narrowband analog RF signal occupying a distinct non-overlapping spectral band within a spectrum of the first wideband analog RF signal; N down converter modules; N analog-to-digital converters (ADCs); and a cross-connect for connecting any one of the N down converter modules to one or more of the N ADCs to analog-to-digital convert only the first narrowband analog RF signals occupying the distinct non-overlapping spectral bands. The method and system of the present disclosure track the occupied bandwidth of the narrowband analog RF signals that make up a wideband analog RF signal rather than a total bandwidth of the wideband analog RF signal.
    Type: Application
    Filed: September 1, 2016
    Publication date: April 27, 2017
    Inventors: Ryan SANTA, Bernard GUAY
  • Patent number: 9438458
    Abstract: A method and system are provided for converting wideband analog radio frequency (RF) signals to a digital domain. In an implementation, the system comprises: an amplifier for receiving and amplifying a first wideband analog RF signal comprising one or more first narrowband analog RF signals, each first narrowband analog RF signal occupying a distinct non-overlapping spectral band within a spectrum of the first wideband analog RF signal; N down converter modules; N analog-to-digital converters (ADCs); and a cross-connect for connecting any one of the N down converter modules to one or more of the N ADCs to analog-to-digital convert only the first narrowband analog RF signals occupying the distinct non-overlapping spectral bands. The method and system of the present disclosure track the occupied bandwidth of the narrowband analog RF signals that make up a wideband analog RF signal rather than a total bandwidth of the wideband analog RF signal.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: September 6, 2016
    Assignee: Microsemi Storage Solutions (U.S.), Inc.
    Inventors: Ryan Santa, Bernard Guay
  • Patent number: 7593411
    Abstract: A bus interface for transfer of SONET/SDH data that supports a plurality of SONET/SDH flows. The invention supports two line coding schemes: 8B/10B encoding of STS-12, and SONET scrambled coding for STS-12, STS-48, and STS-51. The invention additionally supports two modes of line testing: entire links can be tested by inserting and checking PRBS sequences, and the SPE payload of the largest concatenated STS-Nc which the link can carry (STS-12c, STS-48c, STS-51c) can be individually tested by inserting and checking PRBS sequences.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: September 22, 2009
    Assignee: PMC-Sierra, Inc.
    Inventors: Carl D. McCrosky, Bernard Guay, Doug Konkin, Steven F. Lang, Winston K. Mok
  • Patent number: 7543193
    Abstract: A data detection system includes, in part, a CID detector, a DC balance monitor and a transition density detector. The CID detector is configured to detect whether the received data stream includes a CID exceeding a predetermined threshold count. The DC balance monitor is configured to detect DC imbalances in the incoming data and that may be indicative of errors in the data. The transition density detector is configured to detect whether a minimum transition density exists during a given time period. If a violation is detected by any one of these three detectors, an out-of-frame signal is asserted. The incoming data stream may be a scrambled SONET or SDH data stream.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: June 2, 2009
    Assignee: PMC-Sierra, Inc.
    Inventors: Ian Gordon Barrett, Gregory J. Erker, Michael James Smith, Scott Arthur Muma, Jeffrey S. Roe, Bernard Guay
  • Publication number: 20070036173
    Abstract: A bus interface for transfer of SONET/SDH data that supports a plurality of SONET/SDH flows. The invention supports two line coding schemes: 8B/10B encoding of STS-12, and SONET scrambled coding for STS-12, STS-48, and STS-51. The invention additionally supports two modes of line testing: entire links can be tested by inserting and checking PRBS sequences, and the SPE payload of the largest concatenated STS-Nc which the link can carry (STS-12c, STS-48c, STS-51c) can be individually tested by inserting and checking PRBS sequences.
    Type: Application
    Filed: September 18, 2006
    Publication date: February 15, 2007
    Inventors: Carl McCrosky, Bernard Guay, Doug Konkin, Steven Lang, Winston Mok
  • Publication number: 20050025195
    Abstract: A data detection system includes, in part, a CID detector, a DC balance monitor and a transition density detector. The CID detector is configured to detect whether the received data stream includes a CID exceeding a predetermined threshold count. The DC balance monitor is configured to detect DC imbalances in the incoming data and that may be indicative of errors in the data. The transition density detector is configured to detect whether a minimum transition density exists during a given time period. If a violation is detected by any one of these three detectors, an out-of-frame signal is asserted. The incoming data stream may be a scrambled SONET or SDH data stream.
    Type: Application
    Filed: June 2, 2004
    Publication date: February 3, 2005
    Applicant: PMC-Sierra, Inc.
    Inventors: Ian Barrett, Gregory Erker, Michael Smith, Scott Muma, Jeffrey Roe, Bernard Guay
  • Publication number: 20020114348
    Abstract: A bus interface for transfer of SONET/SDH data that supports a plurality of SONET/SDH flows. The invention supports two line coding schemes: 8B/10B encoding of STS-12, and SONET scrambled coding for STS-12, STS-48, and STS-51. The invention additionally supports two modes of line testing: entire links can be tested by inserting and checking PRBS sequences, and the SPE payload of the largest concatenated STS-Nc which the link can carry (STS-12c, STS-48c, STS-51c) can be individually tested by inserting and checking PRBS sequences.
    Type: Application
    Filed: February 21, 2002
    Publication date: August 22, 2002
    Inventors: Carl D. McCrosky, Bernard Guay, Doug Konkin, Steven F. Lang, Winston K. Mok
  • Patent number: 5945860
    Abstract: A CML/ECL clock phase shifter device provides a 360.degree. phase control range and, upon being provided with two CML clock signals related by a known phase difference, the device produces any desired phase in response to a control signal. The device uses a CMOS current switch which generates current signals having the amplitude adjustable with the control signal, which is a digital word. Differential pairs provide amplitude modulated current signals for the input clock and the variant of the input clock. Two MOS transmission networks selectively invert each amplitude modulated signal and sum the signals from each side on a load network. The phase control resolution is optimal over four quadrants for quadrature input clock signals.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: August 31, 1999
    Assignee: Northern Telecom Limited
    Inventors: Bernard Guay, Michael Altmann
  • Patent number: 5825825
    Abstract: A method and a circuit for simple clock recovery from multi-level at high transmission rates. The circuit is compatible with standard PLL-type clock recovery techniques for NRZ and generalized two-level signalling. The timing information is extracted from a single threshold crossing, irrespective of the number of levels (M) of the signal. This was verified to provide sufficient spectral information for the proper operation of a clock recovery PLL. The threshold may be programmed for various line codes.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: October 20, 1998
    Assignee: Northern Telecom Limited
    Inventors: Michael Altmann, Bernard Guay
  • Patent number: 5708391
    Abstract: A programmable high frequency active filter comprises a plurality of basic building blocks connected in parallel. A basic building block includes a transistor pair connected in a differential amplifier configuration, an impedance connected between the emitters of the transistors and a switching block for applying the necessary bias current to the transistors. The transfer function of the filter is programmed with a digital word, the length of which determines the number of basic building blocks included in the configuration. In this way, the equivalent high frequency impedance of the filter is controlled by selecting the configuration and the value of the impedance of each building block.
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: January 13, 1998
    Inventors: Michael Altmann, Bernard Guay
  • Patent number: 5420529
    Abstract: A current steering switch circuit responsive to a CMOS signal. In an specific embodiment the switch is incorporated in a hybrid BiCMOS multiplexer circuit using combined CMOS and CML/ECL signal types. The high speed CML/ECL logic signals are multiplexed under the control of a lower speed CMOS signal. A particular aspect of the circuit is that a CMOS to CML/ECL converter is not used. Additionally, a differential, logic commutation signal is not required.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: May 30, 1995
    Assignee: Northern Telecom Limited
    Inventors: Bernard Guay, Michael Altmann
  • Patent number: 4151278
    Abstract: The present invention relates to a process for the preparation of an extract of Teucrium marum used in therapy, according to which the whole plant, or part of the plant, is subjected to a treatment with a solvent, the said process being characterized in that the said treatment is carried out with a solvent chosen from among the group comprising boiling water in the presence of NH.sub.3, pentane, hexane, heptane, cyclohexane, cyclopentane, petroleum ether, methylene chloride and mixtures of these, and in that, if necessary, the resulting extract is subjected to a purification.
    Type: Grant
    Filed: October 14, 1977
    Date of Patent: April 24, 1979
    Assignee: Institut de Recherches Chimiques et Biologiques Appliquees
    Inventors: Jacques Debat, Jean Lemoine, Bernard Guay, Claude Crescioni