Abstract: Example embodiments of the systems and methods of CCM primary-side regulation disclosed herein subtract an estimate of the secondary IR drop from each output voltage sample. This allows a fixed sample instant to be set (with regard to the beginning of the off or flyback interval), and removes the need to hunt for or adjust to an optimum sample instant, or one with minimum IR drop error. The estimate of the IR drop may be adjusted on a cycle-by-cycle basis, based on the commanded primary peak current, knowing that the peak secondary current will be directly proportional by the turns ratio of the transformer. For improved accuracy, an adjustment may be made for the decay of secondary current during the delay to the sample instant, if the inductance value is known.

Abstract: This invention relates to a control circuit for a buck power factor correction (PFC) stage. Buck PFC stages are commonly used in low cost, high efficiency power converters. These buck PFC stages are typically controlled using a very slow control loop with a crossover frequency of the order of 10 to 20 Hz. However, such a slow response is unsuitable for applications requiring overvoltage protection. The present invention overcomes the problems with the known control circuits for buck PFC stages by implementing a two stage control circuit having a fast outer loop control circuit and a slow inner loop control circuit. The fast outer loop control circuit is in operation during low load conditions and the slow inner loop control circuit is only active under load.

Abstract: Example embodiments of the systems and methods of CCM primary-side regulation disclosed herein subtract an estimate of the secondary IR drop from each output voltage sample. This allows a fixed sample instant to be set (with regard to the beginning of the off or flyback interval), and removes the need to hunt for or adjust to an optimum sample instant, or one with minimum IR drop error. The estimate of the IR drop may be adjusted on a cycle-by-cycle basis, based on the commanded primary peak current, knowing that the peak secondary current will be directly proportional by the turns ratio of the transformer. For improved accuracy, an adjustment may be made for the decay of secondary current during the delay to the sample instant, if the inductance value is known.

Abstract: A sensing arrangement and method a sense winding is used to provide a voltage which represents the voltage appearing across an in-circuit magnetic component. In a flyback phase, when the component is supplying the output, that voltage represents an output voltage and in a supply phase, the supply voltage. This arrangement provides a solution to the problem of the disparity in magnitude of sense winding output during the two phases by proving a pull-up resistor arranged to apply bias to the voltage measured, the pull-up being to a first level during the supply period and to a second value during the flyback period, the first and second levels being selected such that the voltage across the sense winding is scaled differently during the supply period and the flyback period. The invention is suitable for use in a transformer based flyback power converter in which the magnitude disparity problem may be exacerbated by a turns ratio.

Abstract: A sensing arrangement and method a sense winding is used to provide a voltage which represents the voltage appearing across an in-circuit magnetic component. In a flyback phase, when the component is supplying the output, that voltage represents an output voltage and in a supply phase, the supply voltage. This arrangement provides a solution to the problem of the disparity in magnitude of sense winding output during the two phases by proving a pull-up resistor arranged to apply bias to the voltage measured, the pull-up being to a first level during the supply period and to a second value during the flyback period, the first and second levels being selected such that the voltage across the sense winding is scaled differently during the supply period and the flyback period. The invention is suitable for use in a transformer based flyback power converter in which the magnitude disparity problem may be exacerbated by a turns ratio.

Abstract: This invention relates to an ACDC converter (1) comprising a converter input (3) and a converter output (5), a pre-regulation stage (7) and a DC transformer stage (9) comprising a transformer input stage (11) and a transformer output stage (13). The transformer input stage comprises a double ended converter and there is further provided a controller (17) for providing a control signal to the double ended converter. The controller (17) operates the ACDC converter using burst mode control and by sending control signals comprising pulse sets that are designed to provide substantially zero net magnetising current in the double ended converter. The pre-regulation stage preferably comprises a buck converter which in turn also provides power factor correction to the input of the ACDC converter.

Abstract: This invention relates to a control circuit for a buck power factor correction (PFC) stage. Buck PFC stages are commonly used in low cost, high efficiency power converters. These buck PFC stages are typically controlled using a very slow control loop with a crossover frequency of the order of 10 to 20 Hz. However, such a slow response is unsuitable for applications requiring overvoltage protection. The present invention overcomes the problems with the known control circuits for buck PFC stages by implementing a two stage control circuit having a fast outer loop control circuit and a slow inner loop control circuit. The fast outer loop control circuit is in operation during low load conditions and the slow inner loop control circuit is only active under load.

Abstract: This invention relates to an ACDC converter (1) comprising a converter input (3) and a converter output (5), a pre-regulation stage (7) and a DC transformer stage (9) comprising a transformer input stage (11) and a transformer output stage (13). The transformer input stage comprises a double ended converter and there is further provided a controller (17) for providing a control signal to the double ended converter. The controller (17) operates the ACDC converter using burst mode control and by sending control signals comprising pulse sets that are designed to provide substantially zero net magnetising current in the double ended converter. The pre-regulation stage preferably comprises a buck converter which in turn also provides power factor correction to the input of the ACDC converter.

Abstract: A heavy duty cycle power converter (2) has current mode control in which the closed loop control is carried out by a controller (5) using a desired signal (11) which is a function of the difference between the desired duty cycle (7) and the measured duty cycle (6). This fluctuates current mode control without voltage feedback.