Abstract: The transistor includes a semiconductor body having a surface on which are disposed metallic connection contact areas, including means for protection from overloads. At least one of the metallic area comprises a material, such as Al, susceptible to forming a eutectic with the substrate, which is made, for example, of Si. The metallic area is formed from an alloy of the material, such as the Al-Si eutectic, having a melting point whose temperature is lower than the formation temperature of the Al-Si eutectic and higher than the temperature of soldering the semiconductor body on a support.

Abstract: A semiconductor device having in a semiconductor body a Darlington amplifier comprising a vertical enhancement VMOS-transistor (T.sub.1) as input transistor and a vertical bipolar power transistor (T.sub.2) as output transistor. In order to increase the switching speed, a lateral enhancement MOS transistor (T.sub.3) of complementary conductivity type to the first transistor (T.sub.1) is connected in parallel with the emitter-base junction of the bipolar output transistor (T.sub.2). The gate electrodes of the first and second transistors are interconnected and associated with an input terminal E. Double and treble epitaxial layer structures are disclosed for integrating the device in the semiconductor body. The lateral third transistor (T.sub.3) may be provided either within or outside the area of an epitaxial layer forming the emitter zone of the second transistor (T.sub.2).

Abstract: A Darlington amplifier comprising an auxiliary transistor (16) for overload protection. The base of the auxiliary transistor is connected to a tapping (17) provided on a resistor (12) included between the emitter and base of the output transistor (11) of the amplifier, which resistor assists in biassing said auxiliary transistor.

Abstract: A semiconductor device such as an integrated Darlington circuit includes a mesa which is bounded by two parallel grooves which extend into the device substrate. A semiconductor resistor is formed in the mesa and extends from the mesa surface down to a buried epitaxial layer. This semiconductor resistor is separated from the grooves by a region of semiconductor material, so that its resistance may be established in an accurate and reproducible manner.

Abstract: A bipolar transistor includes an integrated resistive emitter zone of closed geometric configuration which divides the emitter region of the transistor into two sub-regions. The integrated resistive emitter zone serves to improve the secondary breakdown characteristics of the transistor, so that transistors in accordance with the invention are particularly suited for use in power transistors.