Patents by Inventor Bernard Pappert

Bernard Pappert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050285658
    Abstract: A voltage level shifting circuit (10) transitions an input signal at a first voltage to a second voltage higher than the first voltage. A cross-coupled latch provides the second voltage. Cascode configured transistors (16, 26) are connected in series with input transistors (18, 28) that receive the first voltage in complementary form. Capacitive devices (34, 40) are connected between the first voltage and gates of the cascode configured transistors for allowing independent small signal variations to occur on the gates of the cascode configured transistors for better control of duty cycle and rise and fall time matching of the level shifting circuit. Isolation devices (32, 38) permit independent modification of small signal voltages to occur on the gates of the cascode configured transistors.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 29, 2005
    Inventors: Kyle Schulmeyer, Lloyd Matthews, Bernard Pappert
  • Patent number: 4827441
    Abstract: A barrel shifter comprises a first plurality of bit lines, a second plurality of bit lines and a plurality of switchable interconnections therebetween. A first subset of the switchable interconnections provide each of a set of desired shifts, while a second subset of the switchable interconnections duplicate certain of the first subset thereof and shorten the worst-case path lengths through the shifter. The first and second pluralities of bit lines may comprise interleaved high- and low-order bit lines of two data buses. Interface means may provide the interleaving function and also may provide means for accomplishing at least one shift in addition to the set of desired shifts. Sense amplifiers may be included for sensing voltage transitions on each bit line.
    Type: Grant
    Filed: March 27, 1986
    Date of Patent: May 2, 1989
    Assignee: Motorola, Inc.
    Inventors: Ashok Someshwar, Bernard Pappert