Patents by Inventor Bernard Stenson
Bernard Stenson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12538804Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.Type: GrantFiled: May 21, 2024Date of Patent: January 27, 2026Assignee: Analog Devices International Unlimited CompanyInventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
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Patent number: 12480936Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.Type: GrantFiled: April 28, 2023Date of Patent: November 25, 2025Assignee: Analog Devices International Unlimited CompanyInventors: Christophe Antoine, Himanshu Jain, Matthew Thomas Canty, Christina B. McLoughlin, Daniel Joseph Lucey, Sinead Maire McDermott, Stephen O'Brien, Bernard Stenson, Shane Geary, William Allan Lane, Michael Coln, Mark Daniel de Leon Alea
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Patent number: 12172168Abstract: A microfabricated thermal platform can be formed over a substrate, such as a silicon wafer, that may form part of the platform. The substrate is coated in a thermally-insulating material, which may be an organic polymer such, as polyimide or SUS. The surface of the thermally-insulating material may include an arrangement of one or more thermal sites, with each site having a reaction plate (or thermal plate) over which chemical reactions may occur. A heating element may be positioned beneath each reaction plate. A fluidic medium, such as a liquid or a gas, may be disposed over the thermal sites. One application is in chemical and biological reactions. In such reactions, the fluidic medium may be an aqueous solution which comprises reagents for those reactions. The fluidic medium may be an ionically conducting fluid, organic solution or a gas. Precise temperature control enables the correct reactions.Type: GrantFiled: June 22, 2020Date of Patent: December 24, 2024Assignee: Analog Devices International Unlimited CompanyInventors: Christophe Antoine, Helen Berney, Bernard Stenson, Ramji Sitaraman Lakshmanan, William Allan Lane, Himanshu Jain, Christina B. McLoughlin, Shane Geary, Michael C. W. Coln, Donal McAuliffe, Roman Trogan
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Publication number: 20240304569Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.Type: ApplicationFiled: May 21, 2024Publication date: September 12, 2024Inventors: Ramji Sitaraman Lakshmanan et al., Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
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Patent number: 12027472Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.Type: GrantFiled: February 20, 2023Date of Patent: July 2, 2024Assignee: Analog Devices International Unlimited CompanyInventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
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Publication number: 20240159596Abstract: A thermal cycle detector includes a first temperature reservoir, a second first temperature reservoir, first thermal barrier, and a plurality of first electrical conductors spanning the first thermal barrier. The first temperature reservoir includes a first transistor, and the second temperature reservoir includes a second transistor. The first thermal barrier is disposed between the first temperature reservoir and the second temperature reservoir. The plurality of first electrical conductors is configured to provide an electrical power source for the thermal cycle detector in response to a thermal gradient across the plurality of first electrical conductors.Type: ApplicationFiled: November 3, 2023Publication date: May 16, 2024Inventors: Edward Coyne, Aileen Anne Cleary, Wassim Bassalee, Gavin P. Cosgrave, Alan J. ODonnell, Ciaran Curtin, Bernard Stenson
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Publication number: 20230280330Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.Type: ApplicationFiled: April 28, 2023Publication date: September 7, 2023Inventors: Christophe ANTOINE, Himanshu JAIN, Matthew Thomas CANTY, Christina B. MCLOUGHLIN, Daniel Joseph LUCEY, Sinead Maire MCDERMOTT, Stephen O'BRIEN, Bernard STENSON, Shane GEARY, William Allan LANE, Michael COLN, Mark Daniel de Leon ALEA
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Patent number: 11740226Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.Type: GrantFiled: October 8, 2018Date of Patent: August 29, 2023Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventors: Christophe Antoine, Himanshu Jain, Matthew Thomas Canty, Christina B. McLoughlin, Daniel Joseph Lucey, Sinead Maire McDermott, Stephen O'Brien, Bernard Stenson, Shane Geary, William Allan Lane, Michael Coln, Mark De Leon Alea
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Publication number: 20230207489Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.Type: ApplicationFiled: February 20, 2023Publication date: June 29, 2023Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
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Patent number: 11616027Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.Type: GrantFiled: November 18, 2020Date of Patent: March 28, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
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Publication number: 20220126300Abstract: The present disclosure relates to a microfabricated thermal platform. The platform is formed over a substrate, which may for example be a silicon wafer, and which may form part of the platform. The substrate is coated in a thermally-insulating material, which may be an organic polymer such, as polyimide or SU8. The thermally-insulating material may have a predetermined thermal conductivity, which is dependent on thickness, geometry and processing. The surface of the thermally-insulating material may include an arrangement of thermal sites, with each site having a reaction plate (or thermal plate) over which chemical reactions may occur. A heating element may be positioned beneath each reaction plate. The thermal platform may have a plurality of such thermal sites arranged over the upper surface of the thermally-insulating material. However, it will be appreciated that in practice, there could be a single thermal site.Type: ApplicationFiled: June 22, 2020Publication date: April 28, 2022Inventors: Christophe Antoine, Helen Berney, Bernard Stenson, Ramji Sitaraman Lakshmana, William Allan Lane, Himanshu Jain, Christina B. McLoughlin, Shane Geary, Michael C.W. Coln, Donal McAuliffe
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Publication number: 20210183790Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.Type: ApplicationFiled: November 18, 2020Publication date: June 17, 2021Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
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Publication number: 20200256842Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.Type: ApplicationFiled: October 8, 2018Publication date: August 13, 2020Applicant: Analog Devices Global Unlimited CompanyInventors: Christophe ANTOINE, Himanshu JAIN, Matthew Thomas CANTY, Christina B. McLOUGHLIN, Daniel Joseph LUCEY, Sinead Maire McDERMOTT, Stephen O'BRIEN, Bernard STENSON, Shane GEARY, William Allan LANE, Michael COLN, Mark De Leon ALEA
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Patent number: 10199482Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.Type: GrantFiled: November 29, 2010Date of Patent: February 5, 2019Assignee: ANALOG DEVICES, INC.Inventors: David Clarke, Paul Daly, Patrick McGuinness, Bernard Stenson, Anne Deignan
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Patent number: 9817087Abstract: A method of manufacture of a sensor, the method comprising, in a first fabrication facility, forming one or more components of the sensor on a substrate; and in a second fabrication facility depositing a sensor layer, such as a magnetoresistive sensor, onto the substrate or over the one or more components. Otherwise contaminating effects of depositing magnetoresistive materials can thus be confined to the second fabrication facility, permitting more advanced fabrication equipment and techniques to be employed in the first fabrication facility.Type: GrantFiled: March 14, 2012Date of Patent: November 14, 2017Assignee: Analog Devices, Inc.Inventors: Bernard Stenson, Stephen O'Brien, Matthew Thomas Canty
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Publication number: 20170102355Abstract: It may be desirable to sense the concentration of a gas in another gas. This measurement may be important to warn of impending danger. Gas sensors may be made in batches by a manual process, leading to large variations in sensor performance between batches and indeed between sensors in a batch. This means the sensors often need individual calibration before use. The present approach to sensor design can make use of integrated circuit manufacturing techniques to give rise to sensors with well-matched and reproducible characteristics.Type: ApplicationFiled: October 9, 2015Publication date: April 13, 2017Inventors: Patrick M. McGuinness, Seamus P. Whiston, William A. Lane, Thomas G. O'Dwyer, John Jude O'Donnell, Bernard Stenson, Shane Geary, Helen Berney, Raymond J. Speer
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Publication number: 20130241543Abstract: A method of manufacture of a sensor, the method comprising, in a first fabrication facility, forming one or more components of the sensor on a substrate; and in a second fabrication facility depositing a sensor layer, such as a magnetoresistive sensor, onto the substrate or over the one or more components. Otherwise contaminating effects of depositing magnetoresistive materials can thus be confined to the second fabrication facility, permitting more advanced fabrication equipment and techniques to be employed in the first fabrication facility.Type: ApplicationFiled: March 14, 2012Publication date: September 19, 2013Applicant: Analog Devices, Inc.Inventors: Bernard Stenson, Stephen O'Brien, Matthew Thomas Canty
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Publication number: 20120133025Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.Type: ApplicationFiled: November 29, 2010Publication date: May 31, 2012Applicant: ANALOG DEVICES, INC.Inventors: David Clarke, Paul Daly, Patrick McGuinness, Bernard Stenson, Anne Deignan
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Patent number: 7986027Abstract: The method provides a semiconductor structure and method for forming such a structure that provides for protection for resistive layers formed within the structure from contamination from adjacent layers. By encapsulating the resistive layer in a material that is resistant to the diffusion of contaminants it is possible to protect the resistive material during the processing required to manufacture the structure.Type: GrantFiled: October 20, 2006Date of Patent: July 26, 2011Assignee: Analog Devices, Inc.Inventors: Eamon Hynes, William A. Lane, Bernard Stenson
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Publication number: 20080094168Abstract: The method provides a semiconductor structure and method for forming such a structure that provides for protection for resistive layers formed within the structure from contamination from adjacent layers. By encapsulating the resistive layer in a material that is resistant to the diffusion of contaminants it is possible to protect the resistive material during the processing required to manufacture the structure.Type: ApplicationFiled: October 20, 2006Publication date: April 24, 2008Applicant: Analog Devices, Inc.Inventors: Eamon Hynes, William A. Lane, Bernard Stenson