Patents by Inventor Bernard Stenson

Bernard Stenson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12538804
    Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
    Type: Grant
    Filed: May 21, 2024
    Date of Patent: January 27, 2026
    Assignee: Analog Devices International Unlimited Company
    Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
  • Patent number: 12480936
    Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: November 25, 2025
    Assignee: Analog Devices International Unlimited Company
    Inventors: Christophe Antoine, Himanshu Jain, Matthew Thomas Canty, Christina B. McLoughlin, Daniel Joseph Lucey, Sinead Maire McDermott, Stephen O'Brien, Bernard Stenson, Shane Geary, William Allan Lane, Michael Coln, Mark Daniel de Leon Alea
  • Patent number: 12172168
    Abstract: A microfabricated thermal platform can be formed over a substrate, such as a silicon wafer, that may form part of the platform. The substrate is coated in a thermally-insulating material, which may be an organic polymer such, as polyimide or SUS. The surface of the thermally-insulating material may include an arrangement of one or more thermal sites, with each site having a reaction plate (or thermal plate) over which chemical reactions may occur. A heating element may be positioned beneath each reaction plate. A fluidic medium, such as a liquid or a gas, may be disposed over the thermal sites. One application is in chemical and biological reactions. In such reactions, the fluidic medium may be an aqueous solution which comprises reagents for those reactions. The fluidic medium may be an ionically conducting fluid, organic solution or a gas. Precise temperature control enables the correct reactions.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: December 24, 2024
    Assignee: Analog Devices International Unlimited Company
    Inventors: Christophe Antoine, Helen Berney, Bernard Stenson, Ramji Sitaraman Lakshmanan, William Allan Lane, Himanshu Jain, Christina B. McLoughlin, Shane Geary, Michael C. W. Coln, Donal McAuliffe, Roman Trogan
  • Publication number: 20240304569
    Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
    Type: Application
    Filed: May 21, 2024
    Publication date: September 12, 2024
    Inventors: Ramji Sitaraman Lakshmanan et al., Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
  • Patent number: 12027472
    Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: July 2, 2024
    Assignee: Analog Devices International Unlimited Company
    Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
  • Publication number: 20240159596
    Abstract: A thermal cycle detector includes a first temperature reservoir, a second first temperature reservoir, first thermal barrier, and a plurality of first electrical conductors spanning the first thermal barrier. The first temperature reservoir includes a first transistor, and the second temperature reservoir includes a second transistor. The first thermal barrier is disposed between the first temperature reservoir and the second temperature reservoir. The plurality of first electrical conductors is configured to provide an electrical power source for the thermal cycle detector in response to a thermal gradient across the plurality of first electrical conductors.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 16, 2024
    Inventors: Edward Coyne, Aileen Anne Cleary, Wassim Bassalee, Gavin P. Cosgrave, Alan J. ODonnell, Ciaran Curtin, Bernard Stenson
  • Publication number: 20230280330
    Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.
    Type: Application
    Filed: April 28, 2023
    Publication date: September 7, 2023
    Inventors: Christophe ANTOINE, Himanshu JAIN, Matthew Thomas CANTY, Christina B. MCLOUGHLIN, Daniel Joseph LUCEY, Sinead Maire MCDERMOTT, Stephen O'BRIEN, Bernard STENSON, Shane GEARY, William Allan LANE, Michael COLN, Mark Daniel de Leon ALEA
  • Patent number: 11740226
    Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: August 29, 2023
    Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
    Inventors: Christophe Antoine, Himanshu Jain, Matthew Thomas Canty, Christina B. McLoughlin, Daniel Joseph Lucey, Sinead Maire McDermott, Stephen O'Brien, Bernard Stenson, Shane Geary, William Allan Lane, Michael Coln, Mark De Leon Alea
  • Publication number: 20230207489
    Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
    Type: Application
    Filed: February 20, 2023
    Publication date: June 29, 2023
    Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
  • Patent number: 11616027
    Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: March 28, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
  • Publication number: 20220126300
    Abstract: The present disclosure relates to a microfabricated thermal platform. The platform is formed over a substrate, which may for example be a silicon wafer, and which may form part of the platform. The substrate is coated in a thermally-insulating material, which may be an organic polymer such, as polyimide or SU8. The thermally-insulating material may have a predetermined thermal conductivity, which is dependent on thickness, geometry and processing. The surface of the thermally-insulating material may include an arrangement of thermal sites, with each site having a reaction plate (or thermal plate) over which chemical reactions may occur. A heating element may be positioned beneath each reaction plate. The thermal platform may have a plurality of such thermal sites arranged over the upper surface of the thermally-insulating material. However, it will be appreciated that in practice, there could be a single thermal site.
    Type: Application
    Filed: June 22, 2020
    Publication date: April 28, 2022
    Inventors: Christophe Antoine, Helen Berney, Bernard Stenson, Ramji Sitaraman Lakshmana, William Allan Lane, Himanshu Jain, Christina B. McLoughlin, Shane Geary, Michael C.W. Coln, Donal McAuliffe
  • Publication number: 20210183790
    Abstract: An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.
    Type: Application
    Filed: November 18, 2020
    Publication date: June 17, 2021
    Inventors: Ramji Sitaraman Lakshmanan, Bernard Stenson, Padraig Liam Fitzgerald, Oliver Kierse, Michael James Twohig, Michael John Flynn, Laurence Brendan O'Sullivan
  • Publication number: 20200256842
    Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.
    Type: Application
    Filed: October 8, 2018
    Publication date: August 13, 2020
    Applicant: Analog Devices Global Unlimited Company
    Inventors: Christophe ANTOINE, Himanshu JAIN, Matthew Thomas CANTY, Christina B. McLOUGHLIN, Daniel Joseph LUCEY, Sinead Maire McDERMOTT, Stephen O'BRIEN, Bernard STENSON, Shane GEARY, William Allan LANE, Michael COLN, Mark De Leon ALEA
  • Patent number: 10199482
    Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: February 5, 2019
    Assignee: ANALOG DEVICES, INC.
    Inventors: David Clarke, Paul Daly, Patrick McGuinness, Bernard Stenson, Anne Deignan
  • Patent number: 9817087
    Abstract: A method of manufacture of a sensor, the method comprising, in a first fabrication facility, forming one or more components of the sensor on a substrate; and in a second fabrication facility depositing a sensor layer, such as a magnetoresistive sensor, onto the substrate or over the one or more components. Otherwise contaminating effects of depositing magnetoresistive materials can thus be confined to the second fabrication facility, permitting more advanced fabrication equipment and techniques to be employed in the first fabrication facility.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: November 14, 2017
    Assignee: Analog Devices, Inc.
    Inventors: Bernard Stenson, Stephen O'Brien, Matthew Thomas Canty
  • Publication number: 20170102355
    Abstract: It may be desirable to sense the concentration of a gas in another gas. This measurement may be important to warn of impending danger. Gas sensors may be made in batches by a manual process, leading to large variations in sensor performance between batches and indeed between sensors in a batch. This means the sensors often need individual calibration before use. The present approach to sensor design can make use of integrated circuit manufacturing techniques to give rise to sensors with well-matched and reproducible characteristics.
    Type: Application
    Filed: October 9, 2015
    Publication date: April 13, 2017
    Inventors: Patrick M. McGuinness, Seamus P. Whiston, William A. Lane, Thomas G. O'Dwyer, John Jude O'Donnell, Bernard Stenson, Shane Geary, Helen Berney, Raymond J. Speer
  • Publication number: 20130241543
    Abstract: A method of manufacture of a sensor, the method comprising, in a first fabrication facility, forming one or more components of the sensor on a substrate; and in a second fabrication facility depositing a sensor layer, such as a magnetoresistive sensor, onto the substrate or over the one or more components. Otherwise contaminating effects of depositing magnetoresistive materials can thus be confined to the second fabrication facility, permitting more advanced fabrication equipment and techniques to be employed in the first fabrication facility.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 19, 2013
    Applicant: Analog Devices, Inc.
    Inventors: Bernard Stenson, Stephen O'Brien, Matthew Thomas Canty
  • Publication number: 20120133025
    Abstract: An apparatus includes an electrostatic discharge (ESD) protection device configured to protect a circuit from ESD conditions. The protection device includes an emitter region having a first diffusion polarity; a collector region laterally spaced apart from the emitter region, and having the first diffusion polarity; and a barrier region interposed laterally between the emitter region and the collector region while contacting the emitter region. The barrier region has a second diffusion polarity opposite from the first diffusion polarity. The device can further include a base region having the second diffusion polarity, and laterally surrounding and underlying the emitter region and the barrier region. The barrier region can have a higher dopant concentration than the base region, and block a lateral current flow between the collector and emitter regions, thus forming a vertical ESD device having enhanced ESD performance.
    Type: Application
    Filed: November 29, 2010
    Publication date: May 31, 2012
    Applicant: ANALOG DEVICES, INC.
    Inventors: David Clarke, Paul Daly, Patrick McGuinness, Bernard Stenson, Anne Deignan
  • Patent number: 7986027
    Abstract: The method provides a semiconductor structure and method for forming such a structure that provides for protection for resistive layers formed within the structure from contamination from adjacent layers. By encapsulating the resistive layer in a material that is resistant to the diffusion of contaminants it is possible to protect the resistive material during the processing required to manufacture the structure.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: July 26, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Eamon Hynes, William A. Lane, Bernard Stenson
  • Publication number: 20080094168
    Abstract: The method provides a semiconductor structure and method for forming such a structure that provides for protection for resistive layers formed within the structure from contamination from adjacent layers. By encapsulating the resistive layer in a material that is resistant to the diffusion of contaminants it is possible to protect the resistive material during the processing required to manufacture the structure.
    Type: Application
    Filed: October 20, 2006
    Publication date: April 24, 2008
    Applicant: Analog Devices, Inc.
    Inventors: Eamon Hynes, William A. Lane, Bernard Stenson