Patents by Inventor Bernard Vanoudheusden

Bernard Vanoudheusden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4332028
    Abstract: Disclosed is a method and apparatus (tester) for measuring the memory address access time (AAT) of RAM and ROS memories. The method and apparatus utilizes the data recirculation technique. The method is based on the following principle: memory (20, FIG. 9) is loaded with a predetermined data configuration, and, then, the output lines (d.O) of the memory are looped back and connected to the address lines (ad), through .tau.-delay lines (22); it is established that the memory oscillates with frequency ##EQU1## deducing therefrom the AAT time which is the required address access time, factor p being a function of the loaded configuration. The tester implementing such a method is illustrated in the drawing. In a first step, the data configuration contained in block (95) is transferred to memory (20), through multiplexer (94), to the appropriate addresses (di), through multiplexer (93), under the control of counter (92) and clock (91); the read/write selection line (21) is in "write" position.
    Type: Grant
    Filed: April 18, 1980
    Date of Patent: May 25, 1982
    Assignee: International Business Machines Corporation
    Inventors: Jacky H. Joccotton, Bernard Vanoudheusden