Abstract: Under one aspect, non-volatile transistor device includes a source and drain with a channel in between; a gate structure made of a semiconductive or conductive material disposed over an insulator over the channel; a control gate made of a semiconductive or conductive material; and an electromechanically-deflectable nanotube switching element in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure. The network is such that the nanotube switching element is deflectable into contact with the other of the gate structure and the control gate structure in response to signals being applied to the control gate and one of the source region and drain region.

Abstract: Nanotube on gate FET structures and applications of such, including n2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control gate is made of at least one of semiconductive or conductive material. An electromechanically-deflectable nanotube switching element is in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure.

Abstract: Non-Volatile RAM Cell and Array using Nanotube Switch Position for Information State. A non-volatile memory array includes a plurality of memory cells, each cell receiving a bit line, word line, and release line. Each memory cell includes a cell selection transistor with first, second and third nodes. The first and second nodes are in respective electrical communication with the bit line and the word line. Each cell further includes an electromechanically deflectable switch, having a first, second and third node. The first node is in electrical communication with the release line, and a third node is in electrical communication with the third node of the cell selection transistor. The electromechanically deflectable switch includes a nanotube switching element physically positioned between the first and third nodes of the switch and in electrical communication with the second node of the switch. The second node of the switch is in communication with a reference signal.

Abstract: A four terminal non-volatile transistor device. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and each in electrical communication with a respective terminal. A channel region of a second semiconductor type of material is disposed between the source and drain region. A floating gate structure is made of at least one of semiconductive or conductive material and is disposed over the channel region. A control gate is made of at least one of semiconductive or conductive material and is in electrical communication with a respective terminal. An electromechanically-deflectable nanotube switching element is in electrical communication with one of the floating gate structure and the control gate structure, and is positioned to be electromechanically deflectable into contact with the other of the floating gate structure and the control gate structure.

Abstract: A four terminal non-volatile transistor device. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and each in electrical communication with a respective terminal. A channel region of a second semiconductor type of material is disposed between the source and drain region. A floating gate structure is made of at least one of semiconductive or conductive material and is disposed over the channel region. A control gate is made of at least one of semiconductive or conductive material and is in electrical communication with a respective terminal. An electromechanically-deflectable nanotube switching element is in electrical communication with one of the floating gate structure and the control gate structure, and is positioned to be electromechanically deflectable into contact with the other of the floating gate structure and the control gate structure.