Abstract: An integrated circuit such as a MOS transistor, having an electrically conductive diffusion barrier at the metal/silicon interface and a method of manufacture therefor is disclosed. The metal/silicon interface is formed by selective metal deposition onto silicon. According to the method, the interface is subjected to a nitrogen-based plasma during a period of at least five minutes. The interface is brought to a temperature greater than 500.degree. C. during this period, in order to create a diffusion barrier comprising a silicon nitride layer. The interface is then subjected to an annealing treatment under a neutral atmosphere so as to remove the nitrogen previously introduced into the metal. The diffusion barrier forms a linking and protecting interface between each source drain or gate zone of the MOS transistor and the corresponding layer of metal covering the latter.

Abstract: The invention relates to a process for buried localized oxidation of a silicon substrate. The process consists in performing a) a sealing on the surface of the substrate (S), by a first nitriding, by growing a later of silicon nitride forming at least one surface layer, then in performing b) the etching (G1) of a trench (T) intended to receive the buried localized oxidation. A second nitriding is performed c) on the free area of the trench (T) in order to obtain a sealing sc of the walls of the trench (T). An etching (G2) is performed at d) on the bottom wall of the trench (T) by at least partial etching of the silicon nitride layer obtained by second nitriding in order to uncover the substrate material (S). A localized oxidation e) is performed to produce the buried oxidation (OE) of the substrate in the trench. Application to the production of integrated circuits.