Patents by Inventor Bernd Böhm
Bernd Böhm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250194320Abstract: In an embodiment a method includes providing a carrier, applying a plurality of semiconductor chips to the carrier, the semiconductor chips being spaced apart from one another such that cavities are formed between the semiconductor chips, introducing a photo-exposable material, at least the cavities being filled with the photo-exposable material, exposing the photo-exposable material, wherein parts of the photo-exposable material, which are downstream of the semiconductor chips with respect to an exposure remain unexposed, removing unexposed parts of the photo-exposable material, wherein recesses are formed, applying a functional layer to the semiconductor chips, and removing the exposed photo-exposable material.Type: ApplicationFiled: March 22, 2023Publication date: June 12, 2025Inventors: Bernd Böhm, Markus Klein, Matthias Bruckschloegl, Sebastian Wittmann
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Patent number: 12159956Abstract: Provided is an optoelectronic semiconductor chip including a semiconductor layer sequence having an active layer, a doped current spreading layer and an output coupling layer, which are arranged one above the other in this order. The active layer generates primary radiation during intended operation. The current spreading layer includes a larger lateral electrical conductivity than the output coupling layer. The output coupling layer includes output coupling structures for coupling out radiation on an exit side facing away from the active layer. The output coupling layer includes a lower absorption coefficient for primary radiation than the current spreading layer.Type: GrantFiled: August 13, 2019Date of Patent: December 3, 2024Assignee: OSRAM OLED GMBHInventors: Sebastian Pickel, Katharina Werner, Bernd Böhm, Anna Strozecka-Assig, Anna Nirschl
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Publication number: 20210320223Abstract: In at least one embodiment, the optoelectronic semiconductor chip (100) comprises a semiconductor layer sequence (1) having an active layer (10), a doped current spreading layer (11) and an output coupling layer (12), which are arranged one above the other in this order. The active layer generates primary radiation during intended operation. The current spreading layer comprises a larger lateral electrical conductivity than the output coupling layer. The output coupling layer comprises output coupling structures (121) for coupling out radiation on an exit side (120) facing away from the active layer. The output coupling layer comprises a lower absorption coefficient for primary radiation than the current spreading layer.Type: ApplicationFiled: August 13, 2019Publication date: October 14, 2021Inventors: Sebastian Pickel, Katharina Werner, Bernd Böhm, Anna Strozecka-Assig, Anna Nirschl
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Patent number: 10224393Abstract: A method of producing a plurality of semiconductor chips includes a) providing a carrier substrate having a first major face and a second major face opposite the first major face; b) forming a diode structure between the first major face and the second major face, the diode structure electrically insulating the first major face from the second major face at least with regard to one polarity of an electrical voltage; c) arranging a semiconductor layer sequence on the first major face of the carrier substrate; and d) singulating the carrier substrate with the semiconductor layer sequence into a plurality of semiconductor chips.Type: GrantFiled: June 6, 2017Date of Patent: March 5, 2019Assignee: OSRAM Opto Semiconductors GmbHInventors: Ewald Karl Michael Günther, Andreas Plöβl, Heribert Zull, Thomas Veit, Mathias Kämpf, Jens Dennemarck, Bernd Böhm, Korbinian Perzlmaier
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Publication number: 20170271438Abstract: A method of producing a plurality of semiconductor chips includes a) providing a carrier substrate having a first major face and a second major face opposite the first major face; b) forming a diode structure between the first major face and the second major face, the diode structure electrically insulating the first major face from the second major face at least with regard to one polarity of an electrical voltage; c) arranging a semiconductor layer sequence on the first major face of the carrier substrate; and d) singulating the carrier substrate with the semiconductor layer sequence into a plurality of semiconductor chips.Type: ApplicationFiled: June 6, 2017Publication date: September 21, 2017Inventors: Ewald Karl Michael Günther, Andreas Plössl, Heribert Zull, Thomas Veit, Mathias Kämpf, Jens Dennemarck, Bernd Böhm, Korbinian Perzlmaier
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Patent number: 9704945Abstract: A carrier substrate includes a first major face and a second major face opposite the first major face. A diode structure is formed between the first major face and the second major face, which diode structure electrically insulates the first major face from the second major face at least with regard to one polarity of an electrical voltage.Type: GrantFiled: February 7, 2012Date of Patent: July 11, 2017Assignee: OSRAM Opto Semiconductors GmbHInventors: Ewald Karl Michael Günther, Andreas Plöβl, Heribert Zull, Thomas Veit, Mathias Kämpf, Jens Dennemarck, Bernd Böhm, Korbinian Perzlmaier
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Patent number: 9466487Abstract: A photolithographic method which produces a structure in a radiation-emitting semiconductor component by providing a semiconductor wafer having a semiconductor layer sequence, applying a first photoresist layer to the semiconductor wafer, providing a mask, and arranging the mask relative to the coated semiconductor wafer, exposing the first photoresist layer and imaging the mask in the first photoresist layer, arranging the mask or a different mask relative to the semiconductor wafer at another position different from a first position and again exposing the first photoresist layer and imaging the mask in the first photoresist layer or applying a second photoresist layer to the first photoresist layer, arranging the mask or a different mask relative to the semiconductor wafer at a second position, and exposing the second photoresist layer and imaging the mask in the second photoresist layer, forming a patterned photoresist layer and patterning the semiconductor wafer.Type: GrantFiled: August 15, 2014Date of Patent: October 11, 2016Assignee: OSRAM Opto Semiconductors GmbHInventors: Bernd Böhm, Sebastian Hoibl
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Patent number: 9147806Abstract: An optoelectronic semiconductor chip includes an active layer with a first and a second major face, including a semiconductor material which emits or receives radiation when the semiconductor chip is in operation; a patterned layer including three-dimensional patterns for outcoupling or incoupling radiation and arranged on the first major face in a beam path of the radiation, wherein the patterned layer includes an inorganic-organic hybrid material.Type: GrantFiled: September 15, 2011Date of Patent: September 29, 2015Assignee: OSRAM Opto Semiconductor GmbHInventors: Bernd Böhm, Gertrud Kräuter, Andreas Plöβl
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Publication number: 20150050765Abstract: A photolithographic method which produces a structure in a radiation-emitting semiconductor component by providing a semiconductor wafer having a semiconductor layer sequence, applying a first photoresist layer to the semiconductor wafer, providing a mask, and arranging the mask relative to the coated semiconductor wafer, exposing the first photoresist layer and imaging the mask in the first photoresist layer, arranging the mask or a different mask relative to the semiconductor wafer at another position different from a first position and again exposing the first photoresist layer and imaging the mask in the first photoresist layer or applying a second photoresist layer to the first photoresist layer, arranging the mask or a different mask relative to the semiconductor wafer at a second position, and exposing the second photoresist layer and imaging the mask in the second photoresist layer, forming a patterned photoresist layer and patterning the semiconductor wafer.Type: ApplicationFiled: August 15, 2014Publication date: February 19, 2015Inventors: Bernd Böhm, Sebastian Hoibl
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Publication number: 20140145228Abstract: An optoelectronic semiconductor chip includes an active layer with a first and a second major face, including a semiconductor material which emits or receives radiation when the semiconductor chip is in operation; a patterned layer including three-dimensional patterns for outcoupling or incoupling radiation and arranged on the first major face in a beam path of the radiation, wherein the patterned layer includes an inorganic-organic hybrid material.Type: ApplicationFiled: September 15, 2011Publication date: May 29, 2014Applicant: OSRAM Opto Semiconductors GmbHInventors: Bernd Böhm, Gertrud Kräuter, Andreas Plössl
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Publication number: 20140008770Abstract: A carrier substrate includes a first major face and a second major face opposite the first major face. A diode structure is formed between the first major face and the second major face, which diode structure electrically insulates the first major face from the second major face at least with regard to one polarity of an electrical voltage.Type: ApplicationFiled: February 7, 2012Publication date: January 9, 2014Applicant: OSRAM Opto Semiconductors GmbHInventors: Ewald Karl Michael Günther, Andreas Plößl, Heribert Zull, Thomas Veit, Mathias Kämpf, Jens Dennemarck, Bernd Böhm, Korbinian Perzlmaier
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Publication number: 20120070927Abstract: A method for producing an optoelectronic semiconductor component includes providing a first wafer having a patterned surface, wherein the patterned surface is formed at least in places by elevations having first and second heights, wherein the first height is greater than the second height; providing a second wafer; applying a photoresist to outer areas of the second wafer; patterning a surface of the photoresist facing away from the second wafer by impressing the patterned surface of the first wafer into the photoresist, wherein the elevations are impressed as trenches having a first and second depth into the photoresist; applying a patterning method to the patterned surface of the photoresist, wherein the structure applied on the photoresist is transferred at least in places to the outer area of the second wafer.Type: ApplicationFiled: May 3, 2010Publication date: March 22, 2012Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Elmar Baur, Alexander Heindl, Bernd Böhm, Patrick Rode, Heribert Zull
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Publication number: 20120032306Abstract: A method for patterning a semiconductor surface is specified. A photoresist is applied to an outer area of a second semiconductor wafer. A surface of the photoresist that is remote from the second semiconductor wafer is patterned by impressing a patterned surface of the first wafer into the photoresist. A patterning method is applied to the surface of the photoresist, wherein a structure applied on the photoresist is transferred at least in places to the outer area of the second semiconductor wafer.Type: ApplicationFiled: January 22, 2010Publication date: February 9, 2012Applicant: OSRAM Opto Semiconductors GmbHInventors: Elmar Baur, Bernd Böhm, Alexander Heindl, Patrick Rode, Matthias Sabathil