Abstract: A method of fabricating a vertically profiled electrode like a T-gate 40 on a semiconductor substrate 20 is described. The method comprises providing a resist structure 34 on the substrate 20, the resist structure 34 containing at least a first resist pattern 24? arranged on the substrate 20 and having a first opening 26, the first resist being negative resist, and a second resist pattern 32 having a second opening 30 surrounding the first opening 26. The vertical profile of the gate electrode 40 is defined by the contours and the relative location of the first and the second opening 26, 30. On the resist structure 34 a metal 38 is deposited and lift-off is performed to remove the second resist 32 together with the metal 38 deposited thereon.

Abstract: A method of fabricating a vertically profiled electrode like a T-gate 40 on a semiconductor substrate 20 is described. The method comprises providing a resist structure 34 on the substrate 20, the resist structure 34 containing at least a first resist pattern 24′ arranged on the substrate 20 and having a first opening 26, the first resist being negative resist, and a second resist pattern 32 having a second opening 30 surrounding the first opening 26. The vertical profile of the gate electrode 40 is defined by the contours and the relative location of the first and the second opening 26, 30. On the resist structure 34 a metal 38 is deposited and lift-off is performed to remove the second resist 32 together with the metal 38 deposited thereon.