Abstract: What are proposed are a circuit arrangement and a method for protecting an integrated semiconductor circuit containing a protection circuit having a thyristor structure (SCR) and also a control circuit (TC; C1, R1, I1 to I3) for driving the protection circuit, which are both connected between an element (PV, LV) to be protected and a reference potential (VB), the control circuit (TC; C1, R1, I1 to I3) generating a plurality of control signals which in each case drive an active element (T1, T2) of the thyristor structure. A targeted triggering of the protection circuit in conjunction with defined switching thresholds and short turn-on times is thereby achieved. A possibility for determining the duration of the activation of the control circuit is furthermore proposed.

Abstract: Active protection circuit arrangement A circuit arrangement for protecting integrated semiconductor circuits from electrical pulses or electrical overvoltages is proposed, said circuit arrangement having an RC element which comprises the series circuit formed from a first resistor (R1; R10) and a capacitance (C1; C10) and is connected between two supply potential lines (VDD, VSS), having a chain of inverters (I10-I12) which are connected in series behind one another, the input of said chain being connected to the junction point between the first resistor (R1; R10) and the capacitance (C1; C10), and having a protection transistor (ST) whose control input is connected to the output of the inverter chain and whose outputs are connected to the two supply potential lines (VDD, VSS).