Patents by Inventor Bernd Germann

Bernd Germann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Phase-locked loop circuit
    Patent number: 7440518
    Abstract: A PLL circuit comprises a controller (DRC) adjusting the frequency of frequency modulated signals (uDIV) provided by a frequency modulator (DIV) on the basis of signals provided by a linear range detector (LRD) so that the phase detector gets back into a linear range after a change in the frequency of said frequency modulated signals (uDIV) to a desired frequency. The lock time of the phase-locked loop circuit is improved without the requirement of complex circuitry.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: October 21, 2008
    Assignee: Fujitsu Limited
    Inventors: Bernd Germann, Bardo Müller, Tomislav Drenski
  • Phase-locked loop circuit
    Publication number: 20060039516
    Abstract: A PLL circuit comprises a controller (DRC) adjusting the frequency of frequency modulated signals (uDIV) provided by a frequency modulator (DIV) on the basis of signals pro-vided by a linear range detector (LRD) so that the phase detector gets back into a linear range after a change in the frequency of said frequency modulated signals (uDIV) to a desired frequency. The lock time of the phase-locked loop circuit is improved without the requirement of complex circuitry.
    Type: Application
    Filed: August 5, 2005
    Publication date: February 23, 2006
    Inventors: Bernd Germann, Bardo Muller, Tomislav Drenski