Abstract: A camera module for electronically recording images has an image sensor with a plurality of image cells. Each image cell provides an electric image signal as a function of the intensity of incident light. Each image cell has a light-sensitive element for generating a light-dependent current, as well as at least one MOS transistor which is arranged in series therewith. The gate of the MOS transistor is at a fixed potential, and the source-drain path is flowed through by the light-dependent current. In accordance with one aspect of the invention, there is arranged at least one light source in the region of the image sensor by means of which the image cells can be illuminated.

Abstract: A device for the FPN correction of image signals which are generated by image cells of an image sensor comprises a discriminator for determining in which value range out of at least two value ranges a value of an image signal of an image cell is located at a predetermined instant of time. The result determined by the discriminator is feed to a correction device. The correction device selects correction coefficients from a plurality of sets of correction coefficients as a function of the result determined by the discriminator, and a transformation unit calculates the corrected value for the image signal by using the selected correction coefficients.

Abstract: In order to correct for fixed pattern noise in the signals of an image sensor, image signal values are read out from the pixels of the sensor. Individual correction values are added as analogue quantities to the image signal values via a signal path having a defined transfer function. Parameters which are characteristic of the defined transfer function are provided in a memory and the individual correction values are calculated in a correction value calculating unit using the parameters provided.

Abstract: A method for the transformation of image signals that have been obtained by color filtering and have been logarithmically compressed is proposed. The color saturation of the recorded images is increased thereby. According to one aspect of the invention, the transformed image signals are determined as a function of the logarithmically compressed image signals and the logarithmically compressed brightness signals for a spectral color.

Abstract: In order to correct for fixed pattern noise in the signals of an image sensor, image signal values are read out from the pixels of the sensor. Individual correction values are added as analogue quantities to the image signal values via a signal path having a defined transfer function. Parameters which are characteristic of the defined transfer function are provided in a memory and the individual correction values are calculated in a correction value calculating unit using the parameters provided.

Abstract: A camera module for electronically recording images has an image sensor with a plurality of image cells. Each image cell provides an electric image signal as a function of the intensity of incident light. Each image cell has a light-sensitive element for generating a light-dependent current, as well as at least one MOS transistor which is arranged in series therewith. The gate of the MOS transistor is at a fixed potential, and the source-drain path is flowed through by the light-dependent current. In accordance with one aspect of the invention, there is arranged at least one light source in the region of the image sensor by means of which light source the image cells can be illuminated.

Abstract: A device for the FPN correction of image signals which are generated by image cells of an image sensor comprises a discriminator for determining in which value range out of at least two value ranges a value of an image signal of an image cell is located at a predetermined instant of time. The result determined by the discriminator is feed to a correction device. The correction device selects correction coefficients from a plurality of sets of correction coefficients as a function of the result determined by the discriminator, and a transformation unit calculates the corrected value for the image signal by using the selected correction coefficients.

Abstract: A circuitry for high-speed reading of a video cell for a video pickup chip including a plurality of such video cells disposed in the form of a two-dimensional array, and a read-out logic designed for imaging a high input signal dynamic volume onto a reduced output signal dynamic volume, wherein the photosensitive element of the video cell is connected to the first main electrode of a first MOS transistor (M0) and to the gate of a second MOS transistor (M1) such that the gate and the other main electrode of the first MOS transistor (M0) are short-circuited and applied to an invariable potential (Vpp) so as to achieve a logarithmic characteristic line, and that an output signal amplifier is connected to the second main electrode of the second MOS transistor (M1). Moreover, a method of high speed reading of this video cell is described.

Abstract: What is described here is a method of analog signal processing of video signals from picture elements arranged in an array, which are adapted for discrete scanning in terms of time, using a resistive network, the so-called electronic retina, having a two-dimensional field structure including a number of lines m smaller than the number of lines p of the picture element array, wherein the video signals are transmitted from the picture elements in the electronic retina by lines in such a manner that, starting with the first line of picture elements, the video signals are transmitted into the first line of said electronic retina until after the transmission of the video signals from the m-th line of the picture element arrays into the m-th line of said electronic retina the picture elements of the m+1st line of the picture element array are transmitted into the electronic retina, starting again with the first line, until the p-th line of the picture element array is transmitted in a roll-over manner into the

Abstract: The invention relates to a MOS transistor for a photo cell, comprising a semiconductor substrate on which a gate electrode, a drain electrode and a photosensitive source region are configured. An oxide layer is arranged between the gate electrode and the substrate, and in the active region of the MOS transistor this oxide layer is formed as thin oxide film while it is configured as thick oxide film in a passive region. The inventive transistor is distinguished by the provisions that the gate electrode comprises a closed annular section in the active region of the MOS transistor, and that either the drain electrode or the photosensitive source region is arranged within the annular section of the gate electrode so that current will only flow in the active region.

Abstract: A method for the transformation of image signals that have been obtained by color filtering and have been logarithmically compressed is proposed. The color saturation of the recorded images is increased thereby. According to one aspect of the invention, the transformed image signals are determined as a function of the logarithmically compressed image signals and the logarithmically compressed brightness signals for a spectral color.

Abstract: Inventive methods are provided for the production of large-area membrane masks, wherein an inexpedient mechanical excessive strain on the membrane or of the membrane layer/etching stop layer/supporting wafer system or the resulting breaking of the components is avoided, which excessive strain occurs particularly due to the employment of an etching cell or generally due to the thin semiconductor layers. The stripping of the semiconductor support layer is preferably performed in two partial steps that are carried out in a mechanically sealed etching cell or with a protective coating, or that one partial step is performed with an etching cell and one with a protective coating, or that the stripping of the semiconductor support layer is performed in a mechanically sealed etching cell initially with a supporting grid and that the supporting grid is removed only after withdrawal from the etching cell.

Abstract: The invention relates to a MOS transistor for a photo cell, comprising a semiconductor substrate on which a gate electrode, a drain electrode and a photosensitive source region are configured. An oxide layer is arranged between the gate electrode and the substrate, and in the active region of the MOS transistor this oxide layer is formed as thin oxide film while it is configured as thick oxide film in a passive region.

Abstract: A circuit arrangement for digital multiplication of integers, having an encoding unit, an adding unit, which adds the output values of the encoding unit, and a decoding unit, which decodes the output value of the adding unit. The encoding unit encodes the numbers according to the following formula:X=2.sup.k * (1+X.sub.B)=2.sup.k +X.sub.BY=2.sup.l * (1+Y.sub.B)=2.sup.l +Y.sub.BThe adding unit adds the values k, 1 and x and y, and the mixed terms X.sub.B * Y.sub.B depending on the desired accuracy being either not formed or recursively calculated according to the preceding manner of procedure.

Abstract: A tool device for machining workpieces has a machining tool and at least one sensor oriented toward a machining area of a workpiece to be machined by the machining tool. The at least one sensor senses at least a portion of the machining area and produces sensing signals. At least one processing unit for receiving and processing the sensing signals of the at least one sensor is provided so that an on-line control of the machining process is possible.

Abstract: Disclosed is an integrated circuit having at least two active components, such as transistors, having the following features:a highly conductive substrate is provided which is connected to one pole of a voltage supply source,a semiconductor layer, which is electrically isolated from the substrate and divided into individual sections by lateral isolation regions, is disposed on a main surface of the substrate,placed in each section is at least one active component, e.g., a transistor of any type performance, andlateral deep diffusion regions which are accommodated in the semiconductor layer create a conductive connection between the highly conductive substrate and the corresponding regions of the active components.

Abstract: Disclosed is an image-recorder chip having a multiplicity of image cells provided with field-effect transistors disposed in the form of a two dimensional array and having a readout logic. This present invention is directed to the object of projection of high input signal dynamics onto reduced output signal dynamics, and is distinguished by the arrangement of the light-sensitive element of each image cell being connected between one electrode of a first MOS transistor and gate of a second MOS transistor, and by the other electrode of the first MOS transistor being connected to the one pole of a voltage supply source.

Abstract: A digital-to-analog converter consisting of capacitors for a weighted charge distribution corresponding to the digits of an n-digit binary number that is to be converted to analog form comprises n weighted capacitors. These capacitors are integrated with charging switches for the n-digits of the binary number, discharging switches, charge distributing switches and a reference voltage source being also provided.