Abstract: A semiconductor device and method of manufacture thereof. A porous dielectric material is deposited over a workpiece. The porous dielectric material is patterned, and a photosensitive material is spun-on over the patterned porous dielectric material. A portion of the photosensitive material is formed over, and/or soaks into sidewalls of the porous dielectric material pattern, forming a barrier region of photosensitive material. The photosensitive material is developed, leaving the sidewalls of the porous dielectric material pattern sealed by the barrier region of photosensitive material. A liner is deposited over the porous dielectric material, and a conductive material such as copper is used to fill the pattern in the porous dielectric material. Diffusion of copper into the pores of the porous dielectric material is prevented by the barrier region.

Abstract: A method for treating an edge portion of a wafer with a plasma or select chemical formulation in order to enhance adhesion characteristics and inhibit delamination of a layer of material from the wafer surface only on the edge portion that is being treated. Alternatively, the method may be utilized to effectuate a cleaning of an edge portion of a wafer.

Abstract: Methods of forming air gaps or porous dielectric materials between interconnects of integrated circuits and structures thereof. Air gaps or highly porous dielectric material having a dielectric constant of close to or equal to 1.0 are formed in a first region but not a second region of an interconnect layer. The air gaps or highly porous dielectric material are formed by depositing a first insulating material comprising an energy-sensitive material over a workpiece, depositing a second insulating material over the first insulating material, and exposing the workpiece to energy. At least a portion of the first insulating material in the first region is removed through the second insulating material. Structurally stable insulating material is disposed between conductive lines in the second region of the workpiece, providing mechanical strength for the integrated circuit.

Abstract: Methods of forming air gaps or porous dielectric materials between interconnects of integrated circuits and structures thereof. Air gaps or highly porous dielectric material having a dielectric constant of close to or equal to 1.0 are formed in a first region but not a second region of an interconnect layer. The air gaps or highly porous dielectric material are formed by depositing a first insulating material comprising an energy-sensitive material over a workpiece, depositing a second insulating material over the first insulating material, and exposing the workpiece to energy. At least a portion of the first insulating material in the first region is removed through the second insulating material. Structurally stable insulating material is disposed between conductive lines in the second region of the workpiece, providing mechanical strength for the integrated circuit.

Abstract: Methods for sealing an organic ILD layer and a metal layer after an etching step. The method includes etching through an ILD layer and leaving a remaining portion of an underlying metal layer cap, maintaining the device in an inert gas, and depositing at least a portion of a liner into the opening to seal the ILD layer and the metal layer. Subsequent processing may include formation of a via by etching through the portion of the liner and the remaining portion of the cap layer, and depositing a metal.

Abstract: In damascene processing, metal hardmask sputtering redeposition that occurs during reactive ion etching (RIE) is exploited to produce, during the RIE process, a desired barrier metal liner on the etched feature.

Abstract: A semiconductor device and method of manufacture thereof. A porous dielectric material is deposited over a workpiece. The porous dielectric material is patterned, and a photosensitive material is spun-on over the patterned porous dielectric material. A portion of the photosensitive material is formed over, and/or soaks into sidewalls of the porous dielectric material pattern, forming a barrier region of photosensitive material. The photosensitive material is developed, leaving the sidewalls of the porous dielectric material pattern sealed by the barrier region of photosensitive material. A liner is deposited over the porous dielectric material, and a conductive material such as copper is used to fill the pattern in the porous dielectric material. Diffusion of copper into the pores of the porous dielectric material is prevented by the barrier region.

Abstract: A dry etch process is described for removing silicon nitride masks from silicon dioxide or silicon for use in a semiconductor fabrication process. A remote plasma oxygen/nitrogen discharge is employed with small additions of a fluorine source. The gas mixture is controlled so that atomic fluorine within the reaction chamber is maintained at very low flows compared with the oxygen and nitrogen reactants. Parameters are controlled so that an oxidized reactive layer is formed above any exposed silicon within a matter of seconds from initiating etching of the silicon nitride. Etch rates of silicon nitride to silicon of greater than 30:1 are described, as well as etch rates of silicon nitride to silicon dioxide of greater than 70:1.