Patents by Inventor Bernd Tillack

Bernd Tillack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11858668
    Abstract: A method for filling a receptacle (7), which is at least partly gas-permeable with bulk filling material (2), includes subjecting the receptacle (7) at the outer side to an underpressure, in order to generate a feed of filling material through a filling material conduit (4) into the inside of the receptacle (7). The filling procedure is assisted by way of subjecting the filling material conduit (4) to pressure after completion of a first filling time.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: January 2, 2024
    Assignee: Greif-Velox Maschinenfabrik GmbH
    Inventors: Bernd Tillack, Jan Lorenzen, Janis Feye, Alexander Mildner, Alexander Boje
  • Publication number: 20230415935
    Abstract: A closure device (2) for closing a flexible container (4), in particular a valve bag (4), has a welding device (14), a sensor device (20) for acquiring a position of a part of the container (4) to be closed (6), and a control unit (28). The control unit (28) is coupled with the sensor device (20) and with the welding device (14), and is configured to place the welding device (14) in a first position and a second position spaced apart from the first position on the part of the container (4) to be closed (6) by actuating at least one moving device, to detect when at least one of the two positions has been reached via the sensor unit (20), and to actuate the welding device (14) at the respective first and second position to generate a weld seam on the container (4).
    Type: Application
    Filed: June 21, 2023
    Publication date: December 28, 2023
    Inventors: Alexander BOJE, Bernd TILLACK, Ralf DREWS, Alexander MILDNER
  • Publication number: 20230415930
    Abstract: A valve bag filling device for filling powdered filling material into a valve bag is provided, and has a filling spout (1), which is provided so as to be introduced into a valve hose of a valve bag to be filled. The device has a conveying device for conveying the filling material to be filled from a supply tank through the filling spout (1) into a valve bag resting on the filling spout (1) with the valve hose, as well as a suction device (3, 4) for aspirating excess filling material via a suction opening (5). The suction opening (5) is arranged spaced a distance (9, 10) from the filling spout (1). A control device is provided, with which the suction opening (5) can be traversed in a direction (6) in relation to the filling spout (1).
    Type: Application
    Filed: June 21, 2023
    Publication date: December 28, 2023
    Inventors: Alexander BOJE, Bernd TILLACK, Ralf DREWS, Alexander MILDNER
  • Publication number: 20220332446
    Abstract: A method for filling a receptacle (7), which is at least partly gas-permeable with bulk filling material (2), includes subjecting the receptacle (7) at the outer side to an underpressure, in order to generate a feed of filling material through a filling material conduit (4) into the inside of the receptacle (7). The filling procedure is assisted by way of subjecting the filling material conduit (4) to pressure after completion of a first filling time.
    Type: Application
    Filed: January 14, 2022
    Publication date: October 20, 2022
    Inventors: Bernd TILLACK, Jan LORENZEN, Janis FEYE, Alexander MILDNER, Alexander BOJE
  • Patent number: 9195112
    Abstract: An electro-optic modulator for the modulation of optical radiation of a predetermined wavelength, the electro-optic modulator having at least one optical resonator in which a standing optical wave can be formed for the predetermined wavelength. In the resonator, at least two doped semiconductor sections—as seen in the longitudinal direction of the resonator —are arranged at a distance from one another, and the at least two doped semiconductor sections respectively lie locally at an intensity minimum of the standing optical wave.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: November 24, 2015
    Assignees: TECHNISCHE UNIVERSITÄT BERLIN, IHP GMBH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS
    Inventors: Stefan Meister, Aws Al-Saadi, Hans Joachim Eichler, Bulent Franke, Lars Zimmermann, Bernd Tillack
  • Patent number: 9048052
    Abstract: The invention relates to a microelectromechanical system with an electromechanical microswitch for switching an electrical signal in particular a radio frequency signal, in particular in a GHz range, comprising a multi-level conductive path layer stack arranged on a substrate, wherein conductive paths of the multi-level conductive path layer stack arranged in different conductive levels are insulated from one another through electrically insulating layers and electrically connected with one another through via contacts, an electromechanical switch which is integrated in a recess of the multi-level conductive path layer stack and which includes a contact pivot, an opposite contact and at least one drive electrode for the contact pivot, wherein the contact pivot, the opposite contact and the at least one drive electrode respectively form a portion of a conductive level of the multi-level layer stack.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: June 2, 2015
    Assignee: IHP GmbH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LIEBNIZ-INSTITUT FUR INNOVATIVE MIKROELEKTRONIK
    Inventors: Mehmet Kaynak, Mario Birkholz, Bernd Tillack, Karl-Ernst Ehwald, René Scholz
  • Patent number: 8932405
    Abstract: A reactor arrangement for layer deposition on a plurality of substrates (hereafter substrates) comprising a first reactor chamber for simultaneous cleaning the substrates, at least one second reactor chamber for depositing at least one layer on each of the substrates, a first heating device for setting the substrate temperature of the substrates in the first reactor chamber, a second heating device for setting the substrate temperature of the substrates in the second reactor chamber, a device for producing a gas atmosphere of predetermined composition and predetermined pressure, a transport device for transporting the substrates simultaneously from the first to the second reactor chamber, and a control device for controlling the heating devices and device for producing the gas atmosphere in such a way that the substrates are moved or stored in an interruption-free manner in a reducing gas atmosphere as long as the substrate temperature is above critical temperature Tc.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: January 13, 2015
    Assignee: IHP GmbH—Innovations for High Performance Microelectronics/Institut fur Innovative Mikroelektronik
    Inventors: Thomas Grabolla, George Ritter, Bernd Tillack
  • Publication number: 20140241656
    Abstract: An electro-optic modulator for the modulation of optical radiation of a predetermined wavelength, the electro-optic modulator having at least one optical resonator in which a standing optical wave can be formed for the predetermined wavelength. In the resonator, at least two doped semiconductor sections—as seen in the longitudinal direction of the resonator—are arranged at a distance from one another, and the at least two doped semiconductor sections respectively lie locally at an intensity minimum of the standing optical wave.
    Type: Application
    Filed: March 2, 2012
    Publication date: August 28, 2014
    Inventors: Stefan Meister, Aws Al-Saadi, Hans Joachim Eichler, Bulent Franke, Lars Zimmermann, Bernd Tillack
  • Patent number: 8546249
    Abstract: A method of depositing polycrystalline silicon exclusively on monocrystalline first silicon surface portions of a substrate surface which besides the first surface portions additionally has insulator surface portions, comprising the steps of depositing boron on the first silicon surface portions in an amount which in relation to the first silicon surface portions respectively corresponds to more than a monolayer of boron, and depositing silicon on the first silicon surface portions treated in that way.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: October 1, 2013
    Assignee: IHP GmbH—Innovations for High Performance
    Inventors: Bernd Tillack, Bernd Heinemann, Yuji Yamamoto
  • Publication number: 20130026659
    Abstract: A method for producing a MEMS component including the steps of simultaneously embedding structure elements during producing the multi-level conductive path layer stack which structure elements are to be subsequently exposed, subsequently producing a recess that extends from a substrate backside to the multi-level conductive path layer stack, exposing the micromechanical structure elements in the multi-level conductive path layer stack through the recess. In order to increase process precision a reference mask for defining a lateral position or a lateral extension of the micromechanical structure elements to be exposed is produced, wherein the reference mask is either arranged on the substrate front side between the substrate and the multi-level conductive path layer stack or in a layer of the multi-level conductive path layer stack which layer is more proximal to the substrate than the structure element to be exposed.
    Type: Application
    Filed: March 22, 2011
    Publication date: January 31, 2013
    Applicant: IHP GmbH - Innovations for High Performance Microelectronics
    Inventors: Mehmet Kaynak, Bernd Tillack, Rene Scholz
  • Publication number: 20120280393
    Abstract: The invention relates to a microelectromechanical system with an electromechanical microswitch for switching an electrical signal in particular a radio frequency signal, in particular in a GHz range, comprising a multi-level conductive path layer stack arranged on a substrate, wherein conductive paths of the multi-level conductive path layer stack arranged in different conductive levels are insulated from one another through electrically insulating layers and electrically connected with one another through via contacts, an electromechanical switch which is integrated in a recess of the multi-level conductive path layer stack and which includes a contact pivot, an opposite contact and at least one drive electrode for the contact pivot, wherein the contact pivot, the opposite contact and the at least one drive electrode respectively form a portion of a conductive level of the multi-level layer stack.
    Type: Application
    Filed: December 7, 2010
    Publication date: November 8, 2012
    Applicant: IHP GMBH
    Inventors: Mehmet Kaynak, Mario Birkholz, Bernd Tillack, Karl-Ernst Ehwald, René Scholz
  • Patent number: 7595534
    Abstract: The invention relates to layers in substrate wafers. The aim of the invention is to provide layers in substrate wafers with which the drawbacks of conventional assemblies are overcome in order to achieve, on the one hand, an adequate resistance to latch-up in highly scaled, digital CMOS circuits with comparatively low costs and, on the other hand, to ensure low substrate losses/couplings for analog high-frequency circuits and, in addition, to influence the component behavior in a non-destructive manner.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: September 29, 2009
    Assignee: IHP GmbH-Innovations for High Performance Microelectronics/Institut fur Innovative Mikroelektronik
    Inventors: Bernd Heinemann, Karl-Ernst Ehwald, Dieter Knoll, Bernd Tillack, Dirk Wolansky, Peter Schley
  • Publication number: 20080050929
    Abstract: A method of depositing layers on a plurality of semiconductor substrates simultaneously, comprising the steps: cleaning of at least one respective surface of the substrates in a first reactor at a first substrate temperature Tred, transport of the substrates from the first reactor into a second reactor, and subsequent deposition of at least one respective layer on the semiconductor substrates in the second reactor at a second substrate temperature Tdep, wherein the semiconductor substrates are moved or stored during the cleaning step and during transport from the first reactor into the second reactor in an interruption-free manner in a reducing gas atmosphere as long as the substrate temperature is above a critical temperature Tc which is dependent on the substrate material and the material of the at least one layer to be deposited.
    Type: Application
    Filed: May 10, 2005
    Publication date: February 28, 2008
    Inventors: Thomas Grabolla, George Ritter, Bernd Tillack
  • Patent number: 7244667
    Abstract: System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: July 17, 2007
    Inventors: Bernd Tillack, Dirk Wolansky, Georg Ritter, Thomas Grabolla
  • Publication number: 20040266142
    Abstract: System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.
    Type: Application
    Filed: August 16, 2004
    Publication date: December 30, 2004
    Inventors: Bernd Tillack, Dirk Wolansky, Georg Ritter, Thomas Grabolla
  • Patent number: 6745543
    Abstract: The present invention refers to an apparatus and a method for forming a packaging unit consisting of an endless hose, or for sealing a prefabricated packaging unit, comprising an ultrasonic welding device including an anvil and a sonotrode, which are movable towards each other, and a means for positioning the hose material to be welded between the anvil and the sonotrode. In accordance with the present invention it is suggested that the anvil comprises two anvil parts which are movable relative to one another in the direction of the sonotrode, one of said anvil parts being implemented as a sealing anvil and the other part being implemented as a separating anvil. Hence, the apparatus according to the present invention permits the production of packaging units which end directly at the weld, i.e. in the case of which no length section of the foil material projects outwardly beyond the weld.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: June 8, 2004
    Assignee: Grief-Velox Maschinenfabrik GmbH
    Inventors: Bernd Tillack, Norbert Dietrich, Hans Bernd Dreier
  • Publication number: 20040075118
    Abstract: The invention relates to layers in substrate wafers. The aim of the invention is to provide layers in substrate wafers with which the drawbacks of conventional assemblies are overcome in order to achieve, on the one hand, an adequate resistance to latch-up in highly scaled, digital CMOS circuits with comparatively low costs and, on the other hand, to ensure low substrate losses/couplings for analog high-frequency circuits and, in addition, to influence the component behavior in a non-destructive manner.
    Type: Application
    Filed: November 17, 2003
    Publication date: April 22, 2004
    Inventors: Bernd Heinemann, Karl-Ernst Ehwald, Dieter Knoll, Bernd Tillack, Dirk Wolansky, Peter Schley
  • Publication number: 20030217530
    Abstract: The present invention refers to an apparatus and a method for forming a packaging unit consisting of an endless hose, or for sealing a prefabricated packaging unit, comprising an ultrasonic welding device including an anvil and a sonotrode, which are movable towards each other, and a means for positioning the hose material to be welded between the anvil and the sonotrode. In accordance with the present invention it is suggested that the anvil comprises two anvil parts which are movable relative to one another in the direction of the sonotrode, one of said anvil parts being implemented as a sealing anvil and the other part being implemented as a separating anvil. Hence, the apparatus according to the present invention permits the production of packaging units which end directly at the weld, i.e. in the case of which no length section of the foil material projects outwardly beyond the weld.
    Type: Application
    Filed: May 21, 2002
    Publication date: November 27, 2003
    Inventors: Bernd Tillack, Norbert Dietrich, Hans Bernd Dreier
  • Patent number: 6642553
    Abstract: The invention relates to a bipolar transistor and a method for producing same. The aim of the invention is to provide a bipolar transistor and a method for producing same, which during the use of a single-process poly-silicon technology with differential epitaxis for the production of bases overcomes the disadvantages of conventional systems, so as notably further to improve the high-speed properties of a bipolar transistor, provide the most conductive connections possible between the metal contacts and the active (internal) transistor region as well as a minimized passive transistor surface, while at the same time avoiding greater process complexity and increased contact resistances. To this end a surface relief is produced in the active emitter region by a wet-chemical process. A single-process poly-silicon bipolar transistor having a base produced by epitaxis in accordance with the invention permits a reduction in external base resistance without causing a deterioration in emitter properties.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: November 4, 2003
    Assignee: Institut fuer Halbleiterphysik Frankfurt (Oder) GmbH.
    Inventors: Juergen Drews, Bernd Tillack, Bernd Heinemann, Dieter Knoll
  • Patent number: 6465318
    Abstract: This invention relates to a bi-polar transistor and a procedure for its manufacture. The task of the invention is to propose a bi-polar transistor and a procedure for its manufacture that eliminates the disadvantages of conventional arrangements for a simple polysilicon technology with differential epitaxy for the manufacture of the base, in order to further improve especially the high-speed properties of a bi-polar transistor, to produce highly conductive connections between the metal contacts and the active (inner) transistor region as well as a minimized passive transistor surface, and to simultaneously avoid any additional process complexity and increased contact resistance. This invention resolves the task in that, by creating suitable epitaxy process conditions, the polysilicon layer is deposited on the insulator zone with a greater thickness than the epitaxy layer in the active transistor zone.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: October 15, 2002
    Assignee: Institut fuer Halbleiterphysik Franfurt (Oder) GmbH
    Inventors: Karl-Ernst Ehwald, Bernd Tillack, Bernd Heinemann, Dieter Knoll, Dirk Wolansky