Abstract: This document discusses apparatus and methods for reducing energy consumption of digital-to-time converter (DTC) based transmitters. In an example, a wireless device can include a digital-to-time converter (DTC) configured to receive phase information from a baseband processor and to provide a first modulation signal for generating a wireless signal, and a detector configured to detect an operating condition of the wireless device and to adjust a parameter of the DTC in response to a change in the operating condition.

Abstract: A receiver includes a first amplifier and a second amplifier, a first mixer, a second mixer and a third mixer, a first baseband signal path and a second baseband signal path. A signal output of the first amplifier is coupled to a signal input of the first mixer and a signal input of the second mixer. A signal output of the second amplifier is coupled to a signal input of the third mixer. A signal output of the first mixer and a signal output of the third mixer are coupled to the first baseband signal path. A signal output of the second mixer is coupled to the second baseband signal path.

Abstract: A RF digital to analog converter has a first capacitor arrangement, a first common node, and a first controller. The first capacitor arrangement has multiple switchable capacitor paths arranged in parallel. Respective switchable capacitor paths have a switchable element and a capacitor coupled in series. The first common node is connected to the multiple switchable capacitor paths. The first controller receives a baseband signal having a component, and a local oscillator (LO) signal. The first controller combines the component and the LO signal to obtain a first modulation signal. The first controller controls the multiple switchable capacitor paths of the first capacitor arrangement with the first modulation signal.

Abstract: A transmitter comprises a baseband signal path, which is designed to provide a first baseband signal having an in-phase component and a quadrature component in a first mode of the transmitter and to provide a second baseband signal having an amplitude component and a phase component in a second mode of the transmitter; an oscillator circuit, which is designed to provide an oscillator signal, wherein the oscillator circuit is furthermore designed to provide the oscillator signal as an unmodulated signal in the first mode and to provide the oscillator signal as a modulated signal in the second mode, wherein a modulation of the oscillator signal in the second mode is based on the phase component of the second baseband signal; and a radio-frequency digital-to-analogue converter (RF-DAC), which is designed to receive the oscillator signal, the first baseband signal and the amplitude component of the second baseband signal, wherein the RF-DAC is furthermore designed to provide the vector-modulated RF output signal

Abstract: A RF digital to analog converter has a first capacitor arrangement, a first common node, and a first controller. The first capacitor arrangement has multiple switchable capacitor paths arranged in parallel. Respective switchable capacitor paths have a switchable element and a capacitor coupled in series. The first common node is connected to the multiple switchable capacitor paths. The first controller receives a baseband signal having an in-phase component and a quadrature component, and a local oscillator (LO) signal having an in-phase LO signal and a quadrature LO signal. The first controller combines the in-phase component and the in-phase LO signal to obtain a first in-phase modulation signal and combines the quadrature component and the quadrature LO signal to obtain a first quadrature modulation signal. The first controller controls the multiple switchable capacitor paths of the first capacitor arrangement with the first in-phase modulation signal and/or the first quadrature modulation signal.

Abstract: A push-pull amplifier includes an amplifier input, a push amplifier stage, a pull amplifier stage and an inverting amplifier output.

Abstract: A RF digital to analog converter has a first capacitor arrangement, a first common node, and a first controller. The first capacitor arrangement has multiple switchable capacitor paths arranged in parallel. Respective switchable capacitor paths have a switchable element and a capacitor coupled in series. The first common node is connected to the multiple switchable capacitor paths. The first controller receives a baseband signal having an in-phase component and a quadrature component, and a local oscillator (LO) signal having an in-phase LO signal and a quadrature LO signal. The first controller combines the in-phase component and the in-phase LO signal to obtain a first in-phase modulation signal and combines the quadrature component and the quadrature LO signal to obtain a first quadrature modulation signal. The first controller controls the multiple switchable capacitor paths of the first capacitor arrangement with the first in-phase modulation signal and/or the first quadrature modulation signal.

Abstract: A push-pull amplifier includes an amplifier input, a push amplifier stage, a pull amplifier stage and an inverting amplifier output.

Abstract: The present disclosure relates to a device and method to increase the dynamic bit range of a radio-frequency digital-to-analog converter. A load of the Cap-RF-DAC typically consists of a transformer, which has a transfer ratio N:M derived by the number of windings of the primary and secondary coil, respectively. The load resistance can be varied by using switchable inductors on one or both sides of the transformer to vary an inductance of one of more sides of the switchable transformer, varying the transfer ratio of a transformer resulting in a switchable trans-impedance gain of the transformer. Switchable capacitor may also be configured in parallel to the switchable transformer to keep the load impedance constant while switching the switchable transformer.

Abstract: A receiver includes a first amplifier and a second amplifier, a first mixer, a second mixer and a third mixer, a first baseband signal path and a second baseband signal path. A signal output of the first amplifier is coupled to a signal input of the first mixer and a signal input of the second mixer. A signal output of the second amplifier is coupled to a signal input of the third mixer. A signal output of the first mixer and a signal output of the third mixer are coupled to the first baseband signal path. A signal output of the second mixer is coupled to the second baseband signal path.

Abstract: Embodiments of the present invention create a circuit having a digital-to-time converter with a high-frequency input for receiving a high-frequency signal, a digital input for receiving a first digital signal, and a high-frequency output for the provision of a chronologically delayed version of the HF signal. In addition, the circuit has an oscillator arrangement for the provision of the high-frequency signal, having a phase-locked loop for adjusting a frequency of the high-frequency signal. The digital-to-time converter is designed to chronologically delay the received high-frequency signal based on the first digital signal received at its digital input.

Abstract: A transmitter comprises a baseband signal path, which is designed to provide a first baseband signal having an in-phase component and a quadrature component in a first mode of the transmitter and to provide a second baseband signal having an amplitude component and a phase component in a second mode of the transmitter; an oscillator circuit, which is designed to provide an oscillator signal, wherein the oscillator circuit is furthermore designed to provide the oscillator signal as an unmodulated signal in the first mode and to provide the oscillator signal as a modulated signal in the second mode, wherein a modulation of the oscillator signal in the second mode is based on the phase component of the second baseband signal; and a radio-frequency digital-to-analogue converter (RF-DAC), which is designed to receive the oscillator signal, the first baseband signal and the amplitude component of the second baseband signal, wherein the RF-DAC is furthermore designed to provide the vector-modulated RF output signal

Abstract: A device, which provides a differential output signal having a first output signal component and a second output signal component based on a plurality of input signals, includes a pair of signal sources and a controller. The pair of signal sources includes a first activatable signal source for providing the first output signal component and a second activatable signal source for providing the second output signal component. The controller is operably coupled to the pair of signal sources and is configured to activate either the first signal source or the second signal source of the pair of signal sources depending on the plurality of input signals.

Abstract: A control circuit may be provided. In this case, an output of the control circuit is connected to a control input of a signal generator. Depending on internal signals which identify an operating state of a signal processing device, the control circuit generates a regulating signal at the output. The operating point of the signal generator is thereby set in such a way that a current consumption of the signal processing device is reduced, so that the signal quality is ensured in a sufficient manner.

Abstract: A control circuit may be provided. In this case, an output of the control circuit is connected to a control input of a signal generator. Depending on internal signals which identify an operating state of a signal processing device, the control circuit generates a regulating signal at the output. The operating point of the signal generator is thereby set in such a way that a current consumption of the signal processing device is reduced, so that the signal quality is ensured in a sufficient manner.

Abstract: A signal processing device implemented in a semiconductor body includes a frequency conversion device and a converter connected to the frequency conversion device. The conversion device is coupled by a terminal to a terminal on the surface of the semiconductor body. One terminal of the converter is connected to a terminal node of the signal processing device. A signal generator, which is connected by its signal output to a local oscillator input of the frequency conversion device, has a control input for setting its operating point. Furthermore, a control circuit is provided. In this case, an output of the control circuit is connected to the control input of the signal generator. Depending on internal signals which identify an operating state of the signal processing device, the control circuit generates a regulating signal at the output.

Abstract: A power amplifier arrangement includes a power amplifier with an input for a radio-frequency signal and an output for delivering a second radio-frequency signal. The second radio-frequency signal has a current and a voltage. A second element is configured to deliver a first signal derived from the current of the second radio-frequency signal. Furthermore, a first element is provided to deliver a second signal derived from the voltage of the second radio-frequency signal. An evaluating circuit detects in-phase components of the first and the second signal. As a result, in-phase current and voltage components can be detected together which produce the active power of the second radio-frequency signal by multiplication.

Abstract: A signal processing device implemented in a semiconductor body includes a frequency conversion device and a converter connected to the frequency conversion device. The conversion device is coupled by a terminal to a terminal on the surface of the semiconductor body. One terminal of the converter is connected to a terminal node of the signal processing device. A signal generator, which is connected by its signal output to a local oscillator input of the frequency conversion device, has a control input for setting its operating point. Furthermore, a control circuit is provided. In this case, an output of the control circuit is connected to the control input of the signal generator. Depending on internal signals which identify an operating state of the signal processing device, the control circuit generates a regulating signal at the output.

Abstract: An integrated optoelectronic circuit and process for making is described incorporating a photodetector and a MODFET on a chip. The chip contains a single-crystal semiconductor substrate, a buffer layer of SiGe graded in composition, a relaxed SiGe layer, a quantum well layer, an undoped SiGe spacer layer and a doped SiGe supply layer. The photodetector may be a metal-semiconductor-metal (MSM) or a p-i-n device. The detector may be integrated with an n- or p-type MODFET, or both in a CMOS configuration, and the MODFET can incorporate a Schottky or insulating gate. The invention overcomes the problem of producing Si-manufacturing-compatible monolithic high-speed optoelectronic circuits for 850 nm operation by using epixially-grown Si/SiGe heterostructure layers.