Patents by Inventor Bernhard BENNA

Bernhard BENNA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High performance super-beta NPN (SBNPN)
    Patent number: 11205718
    Abstract: An integrated circuit includes one or more bipolar transistors, each including a first dielectric layer located over a semiconductor layer having a first conductivity type, the dielectric layer including an opening. A second dielectric layer is located between the first dielectric layer and the semiconductor layer. The second dielectric layer defines a first recess between the first dielectric layer and the semiconductor substrate at a first side of the opening, and a second recess between the first dielectric layer and the semiconductor substrate at a second opposite side of the opening. A first doped region of the semiconductor layer is located under the opening, the first doped region having a different second conductivity type and a first width. A second doped region of the semiconductor layer is also under the opening, the second doped region having the second conductivity type and underlying the first recess and the second recess.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: December 21, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bernhard Benna, Berthold Staufer
  • High performance super-beta NPN (SBNPN)
    Patent number: 10032868
    Abstract: A method for making a super ? NPN (SBNPN) transistor includes depositing a tetraethyl orthosilicate (TEOS) layer on a P type epitaxial layer; depositing a nitride layer on the TEOS layer; patterning an emitter region of the SBNPN transistor by selectively etching away portions of the nitride layer and the TEOS layer; depositing a second TEOS layer on top of the nitride layer, along sides of the nitride layer and the TEOS layer, and on top of the P type epitaxial layer; and implanting the P type epitaxial layer through the second TEOS layer with N type ions to form the emitter region of the SBNPN transistor.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: July 24, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bernhard Benna, Wolfgang Schwartz, Berthold Georg Staufer
  • HIGH PERFORMANCE SUPER-BETA NPN (SBNPN)
    Publication number: 20180076283
    Abstract: A method for making a super ? NPN (SBNPN) transistor includes depositing a tetraethyl orthosilicate (TEOS) layer on a P type epitaxial layer; depositing a nitride layer on the TEOS layer; patterning an emitter region of the SBNPN transistor by selectively etching away portions of the nitride layer and the TEOS layer; depositing a second TEOS layer on top of the nitride layer, along sides of the nitride layer and the TEOS layer, and on top of the P type epitaxial layer; and implanting the P type epitaxial layer through the second TEOS layer with N type ions to form the emitter region of the SBNPN transistor.
    Type: Application
    Filed: September 9, 2016
    Publication date: March 15, 2018
    Inventors: Bernhard BENNA, Wolfgang SCHWARTZ, Berthold Georg STAUFER