Abstract: An electric circuit for controlling the access and immobilizing a vehicle has a first antenna driver (12) for driving a first antenna (19) for emitting a signal (100) in the event of identification of an ID transmitter (3) for access control of a vehicle. A second antenna driver (24) is provided for driving a second antenna (21) for emitting a signal (104) in the event of identification of an ID transmitter (3) for the immobilizer of the vehicle. In addition, the electric circuit has a receiver device (14) for receiving a signal captured by an antenna (21) for the identification of an ID transmitter (3) for the immobilizer. The first antenna driver (12) and the receiver device (14) are commonly integrated into a semiconductor chip (1).

Abstract: An electric circuit for controlling the access and immobilizing a vehicle has a first antenna driver (12) for driving a first antenna (19) for emitting a signal (100) in the event of identification of an ID transmitter (3) for access control of a vehicle. A second antenna driver (24) is provided for driving a second antenna (21) for emitting a signal (104) in the event of identification of an ID transmitter (3) for the immobilizer of the vehicle. In addition, the electric circuit has a receiver device (14) for receiving a signal captured by an antenna (21) for the identification of an ID transmitter (3) for the immobilizer. The first antenna driver (12) and the receiver device (14) are commonly integrated into a semiconductor chip (1).

Abstract: A cost-effective safety concept for safety-relevant applications in motor vehicles accordingly activates a load not directly from a central unit, but instead indirectly via a switching device. The latter has a first and a second register for the acquisition of the same control data from the central unit, and a third register for outputting data to the load. A transmission device transmits data from the second register to the third register. A first comparison logic compares a content of the second register with that of the third register and sends an interrupt to the central unit, when the two contents are not identical. A second comparison logic compares the content of the first and second registers and enables the transmission device, when the contents of the two registers are identical and otherwise blocks the transmission device. The last held state is thus maintained in the event of an error.

Abstract: A method for the power-saving control of a receiving device 1, in particular for an access control system for an automobile, is disclosed wherein in an inquiry mode it is determined in response to a control signal Sa whether a receive signal Sr to be processed is supplied by a receiver unit 7 of the receiving device 1 to a controller 3 of the receiving device 1. The receiver unit 7 and the controller 3 are, in response to the control signal Sa, simultaneously switched from a power-saving sleep mode in each case to an active mode in each case.

Abstract: A method for the power-saving control of a receiving device 1, in particular for an access control system for an automobile, is disclosed wherein in an inquiry mode it is determined in response to a control signal Sa whether a receive signal Sr to be processed is supplied by a receiver unit 7 of the receiving device 1 to a controller 3 of the receiving device 1. The receiver unit 7 and the controller 3 are, in response to the control signal Sa, simultaneously switched from a power-saving sleep mode in each case to an active mode in each case.

Abstract: The diagnostics for a switched high-current or safety-relevant load (M) are extended to include active detection of a change in switching state of the load (M) independently of the instant of active actuation by the microcontroller (&mgr;C) and/or a superordinate control unit (SG). The diagnostic feedback is preferably applied to a “wake up” interrupt input of the microcontroller (&mgr;C). This allows active diagnostics in the event of a state change of the load (M), even if the controller (&mgr;C) is in power-down mode (&mgr;Cstop).

Abstract: A control circuit between a control port of a microprocessor and an actuator has a control stage whose terminal connection is connected to an actuator terminal and whose control connection is connected to the control port of the microprocessor. In normal operation, the control port is switched as an input and, depending on the terminal voltage, the control stage outputs a control signal which is amplified in a driver stage. By switching the control port as an output and applying a low level to the control connection, the control stage can be inhibited in special cases, such as when the supply voltage dips below a given threshold.