Patents by Inventor Bernhard Gstoettenbauer

Bernhard Gstoettenbauer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837797
    Abstract: A circuit includes a radio frequency (RF) channel including an input node and an output node and being configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node; a mixer configured to mix an RF reference signal and an RF test signal representative of the RF output signal to generate a mixer output signal; an analog-to-digital converter configured to sample the mixer output signal in order to provide a sequence of sampled values; and a control circuit configured to provide a sequence of phase offsets by phase-shifting at least one of the RF test signal and the RF reference signal using one or more phase shifters, calculate a spectral value from the sequence of sampled values; and calculate estimated phase information indicating a phase of the RF output signal based on the spectral value.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: December 5, 2023
    Assignee: Infineon Technologies AG
    Inventors: Jochen O. Schrattenecker, Niels Christoffers, Vincenzo Fiore, Bernhard Gstoettenbauer, Helmut Kollmann, Alexander Melzer, Alexander Onic, Rainer Stuhlberger, Mathias Zinnoecker
  • Patent number: 11821935
    Abstract: In some examples, this disclosure describes a method of operating a circuit. The method may comprise performing a circuit function under normal operating conditions, wherein performing the circuit function under the normal operating conditions includes performing at least a portion of the circuit functions via a characteristic circuit, performing at least the portion of the circuit function under enhanced stress conditions via a characteristic circuit replica, and predicting a potential future problem with the circuit function under the normal conditions based on an evaluation of operation of the characteristic circuit relative to operation of the characteristic circuit replica.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: November 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Dirk Hammerschmidt, Bernhard Gstoettenbauer, Rafael Zalman, Thomas Zettler, Georg Georgakos, Ludwig Rossmeier, Veit Kleeberger
  • Patent number: 11733288
    Abstract: In some examples, a method of operating a circuit may comprise performing a circuit function under normal conditions, performing the circuit function under aggravated conditions, predicting a potential future problem with the circuit function under the normal conditions based on an output of the circuit function under the aggravated conditions, and outputting a predictive alert based on predicting the potential future problem.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: August 22, 2023
    Assignee: Infineon Technologies AG
    Inventors: Bernhard Gstoettenbauer, Georg Georgakos, Dirk Hammerschmidt, Veit Kleeberger, Ludwig Rossmeier, Rafael Zalman, Thomas Zettler
  • Publication number: 20230169250
    Abstract: In some examples, a method of operating a circuit is described. The method may include performing a circuit function and estimating a probability of failure of the circuit based on one or more stress origination metrics, one or more stress victim events, and one or more initial state conditions.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Veit Kleeberger, Rafael Zalman, Georg Georgakos, Dirk Hammerschmidt, Bernhard Gstoettenbauer, Ludwig Rossmeier, Thomas Zettler
  • Publication number: 20230168295
    Abstract: In some examples, a circuit comprises a function unit configured to perform a circuit function, and one or more in situ monitors configured to measure internal data associated with the circuit. The circuit may further comprise a memory configured to store one or more limit values associated with the one or more in situ monitors, and a lifetime model unit configured to determine whether the circuit has reached an end-of-life threshold based on the measured internal data from the one or more in situ monitors and the limit values.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Georg Georgakos, Bernhard Gstoettenbauer, Dirk Hammerschmidt, Veit Kleeberger, Ludwig Rossmeier, Rafael Zalman, Thomas Zettler
  • Publication number: 20230168294
    Abstract: In some examples, this disclosure describes a method of operating a circuit. The method may comprise performing a circuit function under normal operating conditions, wherein performing the circuit function under the normal operating conditions includes performing at least a portion of the circuit functions via a characteristic circuit, performing at least the portion of the circuit function under enhanced stress conditions via a characteristic circuit replica, and predicting a potential future problem with the circuit function under the normal conditions based on an evaluation of operation of the characteristic circuit relative to operation of the characteristic circuit replica.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Dirk Hammerschmidt, Bernhard Gstoettenbauer, Rafael Zalman, Thomas Zettler, Georg Georgakos, Ludwig Rossmeier, Veit Kleeberger
  • Publication number: 20230169249
    Abstract: In some examples, a method comprises performing a circuit function via a circuit; and estimating a remaining life of the circuit. Moreover, estimating the remaining life of the circuit may include measuring one or more circuit parameters over a period of time during operation of the circuit, and estimating the remaining life of the circuit based on the one or more measured circuit parameters over the period of time during operation of the circuit.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Thomas Zettler, Rafael Zalman, Georg Georgakos, Dirk Hammerschmidt, Ludwig Rossmeier, Bernhard Gstoettenbauer, Veit Kleeberger
  • Publication number: 20230168293
    Abstract: In some examples, a method of operating a circuit may comprise performing a circuit function under normal conditions, performing the circuit function under aggravated conditions, predicting a potential future problem with the circuit function under the normal conditions based on an output of the circuit function under the aggravated conditions, and outputting a predictive alert based on predicting the potential future problem.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Bernhard Gstoettenbauer, Georg Georgakos, Dirk Hammerschmidt, Veit Kleeberger, Ludwig Rossmeier, Rafael Zalman, Thomas Zettler
  • Patent number: 11609265
    Abstract: In some examples, a circuit may be configured to perform a method that includes performing a circuit function via a circuit function unit of a circuit, receiving sensor data from one or more sensors associated with the circuit function unit, and estimating a remaining life of the circuit based on an accelerated reliability model and the sensor data, wherein the sensor data comprises input to the accelerated reliability model. The circuit itself may include a dedicated circuit unit that estimates the remaining life of the circuit based on an accelerated reliability model and the sensor data, and the circuit may output one or more predictive alerts or predictive faults when the remaining life is below a threshold, which may prompt the system for predictive maintenance on the circuit.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Rossmeier, Georg Georgakos, Bernhard Gstoettenbauer, Dirk Hammerschmidt, Veit Kleeberger, Rafael Zalman, Thomas Zettler
  • Patent number: 11397240
    Abstract: One example of a radar device includes a phase-locked loop for generating a radiofrequency signal. The phase-locked loop has a multi-modulus divider. The radar device furthermore comprises a delta-sigma modulator for generating a modulated signal for the multi-modulus divider, and a signal generator for generating an input signal for the delta-sigma modulator. The radar device has monitoring circuits, wherein a first monitoring circuit is configured to monitor a locked state of the phase-locked loop, a second monitoring circuit is configured to monitor the delta-sigma modulator, and a third monitoring circuit is configured to monitor the signal generator.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: July 26, 2022
    Inventors: Bernhard Greslehner-Nimmervoll, Bernhard Gstoettenbauer, Lukas Heschl, Evangelos Koutsouradis, Alexander Onic
  • Publication number: 20220113375
    Abstract: A method for testing at least one reception path in a radar receiver is provided. The reception path contains a mixer and a downstream signal processing circuit. The method includes injecting a test signal into the radar reception path so that at least a first test tone having a first test tone frequency in a passband of the downstream signal processing circuit and a second test tone having a second test tone frequency outside the passband are present on the radar reception path downstream of the mixer; and determining a characteristic of the radar reception path based on a first characteristic of a baseband signal at the first test tone frequency and a second characteristic of the baseband signal at the second test tone frequency.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Applicant: Infineon Technologies AG
    Inventors: Alexander ONIC, Bernhard GSTOETTENBAUER, Thomas LANGSCHWERT, Jochen O. Schrattenecker, Rainer STUHLBERGER
  • Patent number: 11277150
    Abstract: The present disclosure relates to a safety system having a memory unit configured to store a series of executable instructions. In some embodiments, the executable instructions are grouped into code parts, and each code part is assigned a predefined code value. A processor is configured to execute the series of executable instructions, and to output the predefined code values respectively as the code parts are executed. A program flow monitoring (PFM) unit is configured to respectively receive the predefined code values from the processor, such that the PFM unit generates an error-checking value from the predefined code values. A verification unit is configured to compare the error-checking value to an expected return value to determine whether the series of executable instructions executed properly.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: March 15, 2022
    Assignee: Infineon Technologies AG
    Inventor: Bernhard Gstoettenbauer
  • Patent number: 11269055
    Abstract: A method for testing at least one reception path in a radar receiver is provided. The reception path contains a mixer and a downstream signal processing circuit. The method involves injecting a test signal into the reception path, so that at least a first test tone having a frequency in a passband of the signal processing circuit and a second test tone having a frequency outside the passband are present on the reception path downstream of the mixer. Further, the method involves tapping off a baseband signal, generated by the signal processing circuit, from the reception path, the baseband signal being based on the test signal.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 8, 2022
    Inventors: Alexander Onic, Bernhard Gstoettenbauer, Thomas Langschwert, Jochen O. Schrattenecker, Rainer Stuhlberger
  • Publication number: 20210391650
    Abstract: A circuit includes a radio frequency (RF) channel including an input node and an output node and being configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node; a mixer configured to mix an RF reference signal and an RF test signal representative of the RF output signal to generate a mixer output signal; an analog-to-digital converter configured to sample the mixer output signal in order to provide a sequence of sampled values; and a control circuit configured to provide a sequence of phase offsets by phase-shifting at least one of the RF test signal and the RF reference signal using one or more phase shifters, calculate a spectral value from the sequence of sampled values; and calculate estimated phase information indicating a phase of the RF output signal based on the spectral value.
    Type: Application
    Filed: August 26, 2021
    Publication date: December 16, 2021
    Applicant: Infineon Technologies AG
    Inventors: Jochen O. Schrattenecker, Niels CHRISTOFFERS, Vincenzo FIORE, Bernhard GSTOETTENBAUER, Helmut KOLLMANN, Alexander MELZER, Alexander ONIC, Rainer STUHLBERGER, Mathias ZINNOECKER
  • Patent number: 11158944
    Abstract: A circuit is described herein. In accordance with one embodiment the circuit includes two or more RF channels, wherein each channel includes an input node, a phase shifter and an output node. Each channel is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: October 26, 2021
    Inventors: Jochen O. Schrattenecker, Niels Christoffers, Vincenzo Fiore, Bernhard Gstoettenbauer, Helmut Kollmann, Alexander Melzer, Alexander Onic, Rainer Stuhlberger, Mathias Zinnoecker
  • Patent number: 11156709
    Abstract: A radar system includes a first radar chip with a first RF contact, a second radar chip with a second RF contact, an RF signal path connecting the first RF contact to the second RF contact, and a local oscillator arranged in the first radar chip and configured to generate an RF oscillator signal, and which is coupled to the first RF contact to transmit the RF oscillator signal to the second radar chip. A feedback circuit arranged in the second radar chip is switchably connected to the second RF contact and is configured to reflect at least part of the RF oscillator signal arriving over the RFRF signal path as an RF feedback signal. A measurement circuit, arranged in the first radar chip, coupled to the first RF contact via a coupler receives the RF feedback signal and is configured to determine a signal that represents a phase shift.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: October 26, 2021
    Inventors: Alexander Melzer, Bernhard Gstoettenbauer, Alexander Onic, Clemens Pfeffer, Christian Schmid
  • Patent number: 10970163
    Abstract: A frequency signal generator includes a controllable oscillator unit, a frequency control unit and an error detection unit. The controllable oscillator unit generates and provides a frequency signal. The frequency control unit generates a frequency control signal and the controllable oscillator unit varies a frequency of the frequency signal based on the frequency control signal. Further, the error detection unit receives the frequency control signal, detects an error within the frequency control signal and provides an error signal. The error signal comprises information on a detected error.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: April 6, 2021
    Assignee: Infineon Technologies AG
    Inventors: Bernhard Gstoettenbauer, Klemens Kordik
  • Publication number: 20200153455
    Abstract: The present disclosure relates to a safety system having a memory unit configured to store a series of executable instructions. In some embodiments, the executable instructions are grouped into code parts, and each code part is assigned a predefined code value. A processor is configured to execute the series of executable instructions, and to output the predefined code values respectively as the code parts are executed. A program flow monitoring (PFM) unit is configured to respectively receive the predefined code values from the processor, such that the PFM unit generates an error-checking value from the predefined code values. A verification unit is configured to compare the error-checking value to an expected return value to determine whether the series of executable instructions executed properly.
    Type: Application
    Filed: January 10, 2020
    Publication date: May 14, 2020
    Inventor: Bernhard Gstoettenbauer
  • Publication number: 20200072942
    Abstract: One example of a radar device includes a phase-locked loop for generating a radiofrequency signal. The phase-locked loop has a multi-modulus divider. The radar device furthermore comprises a delta-sigma modulator for generating a modulated signal for the multi-modulus divider, and a signal generator for generating an input signal for the delta-sigma modulator. The radar device has monitoring circuits, wherein a first monitoring circuit is configured to monitor a locked state of the phase-locked loop, a second monitoring circuit is configured to monitor the delta-sigma modulator, and a third monitoring circuit is configured to monitor the signal generator.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 5, 2020
    Applicant: Infineon Technologies AG
    Inventors: Bernhard GRESLEHNER-NIMMERVOLL, Bernhard GSTOETTENBAUER, Lukas HESCHL, Evangelos KOUTSOURADIS, Alexander ONIC
  • Patent number: 10536168
    Abstract: The present disclosure relates to a safety system having a memory unit configured to store a series of executable instructions. In some embodiments, the executable instructions are grouped into code parts, and each code part is assigned a predefined code value. A processor is configured to execute the series of executable instructions, and to output the predefined code values respectively as the code parts are executed. A program flow monitoring (PFM) unit is configured to respectively receive the predefined code values from the processor, such that the PFM unit generates an error-checking value from the predefined code values. A verification unit is configured to compare the error-checking value to an expected return value to determine whether the series of executable instructions executed properly.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: January 14, 2020
    Assignee: Infineon Technologies AG
    Inventor: Bernhard Gstoettenbauer