Abstract: A ripple monitoring circuit may generate information indicative of a failing component in a power supply. At least one input may receive a ripple signal from the power supply that has a ripple component. A quantization circuit may repeatedly quantize the amplitude of the ripple component. A ripple amplitude statistics counter bank may count and store the number of times that different quantized amplitudes or different ranges of quantized amplitudes of the ripple component occurred. A ripple monitoring circuit may generate information about a power supply. At least one input may receive a ripple signal from the power supply that has a ripple component. A ripple measurement circuit may measure a characteristic of the ripple component. A storage circuit may store information about the measurement. A comparison circuit may compare information stored in the storage circuit with a threshold value and indicate when the stored information meets or exceeds this threshold value.

Abstract: A ripple monitoring circuit may generate information indicative of a failing component in a power supply. At least one input may receive a ripple signal from the power supply that has a ripple component. A quantization circuit may repeatedly quantize the amplitude of the ripple component. A ripple amplitude statistics counter bank may count and store the number of times that different quantized amplitudes or different ranges of quantized amplitudes of the ripple component occurred. A ripple monitoring circuit may generate information about a power supply. At least one input may receive a ripple signal from the power supply that has a ripple component. A ripple measurement circuit may measure a characteristic of the ripple component. A storage circuit may store information about the measurement. A comparison circuit may compare information stored in the storage circuit with a threshold value and indicate when the stored information meets or exceeds this threshold value.

Abstract: Method and system for measuring the resistance of a resistive structure having at least three nodes. A first calibration signal is determined by measuring a voltage at an output of the resistance structure when no calibration current is injected into a third node between the first and second nodes of the structure. A calibration current is then injected into the third node and a second calibration signal is determined. The absolute value of the difference between the first calibration signal and the second calibration signal is determined, the absolute value being proportional to a product of the resistance of the resistive structure and the calibration current.

Abstract: Method and system for configuring a serial interface. The system includes one or more input nodes each coupled to a corresponding serial bus. One or more output nodes are coupled to a respective serial bus, each output node having a respective driver. A voltage detection circuit determines the voltage at a configuration node. Mode of serial bus operation is based on the voltage level detected at the configuration node. In at least one mode of serial bus operation, the configuration node is used as a mode select input and power source for at least one output driver.

Abstract: Method and system for measuring the resistance of a resistive structure having at least three nodes. A first calibration signal is determined by measuring a voltage at an output of the resistance structure when no calibration current is injected into a third node between the first and second nodes of the structure. A calibration current is then injected into the third node and a second calibration signal is determined. The absolute value of the difference between the first calibration signal and the second calibration signal is determined, the absolute value being proportional to a product of the resistance of the resistive structure and the calibration current.

Abstract: Method and system for configuring a serial interface. The system includes one or more input nodes each coupled to a corresponding serial bus. One or more output nodes are coupled to a respective serial bus, each output node having a respective driver. A voltage detection circuit determines the voltage at a configuration node. Mode of serial bus operation is based on the voltage level detected at the configuration node. In at least one mode of serial bus operation, the configuration node is used as a mode select input and power source for at least one output driver.

Abstract: A temperature compensation circuit for generating a temperature compensating reference voltage (VREF) may include a Bandgap reference circuit configured to generate a Bandgap reference voltage (VBGR) that is substantially temperature independent and a proportional-to-absolute-temperature reference voltage (VPTAT) that varies substantially in proportion to absolute temperature. The circuit may also include an operational amplifier that is connected to the Bandgap reference circuit and that has an output on which VREF is based. The circuit may also include a feedback circuit that is connected to the operational amplifier and to the Bandgap reference circuit and that is configured so as to cause VREF to be substantially equal to VPTAT times a constant k1, minus VBGR times a constant k2.

Abstract: A temperature compensation circuit for generating a temperature compensating reference voltage (VREF) may include a Bandgap reference circuit configured to generate a Bandgap reference voltage (VBGR) that is substantially temperature independent and a proportional-to-absolute-temperature reference voltage (VPTAT) that varies substantially in proportion to absolute temperature. The circuit may also include an operational amplifier that is connected to the Bandgap reference circuit and that has an output on which VREF is based. The circuit may also include a feedback circuit that is connected to the operational amplifier and to the Bandgap reference circuit and that is configured so as to cause VREF to be substantially equal to VPTAT times a constant k1, minus VBGR times a constant k2.