Patents by Inventor Bernhard Laschinsky

Bernhard Laschinsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Serialization of hardware and software debug data
    Patent number: 7640472
    Abstract: An integrated circuit (IC) having a link layer that (1) simultaneously receives both hardware debug data from on-chip ASIC logic and software debug data from an on-chip programmable processor and (2) serializes the hardware and software debug data streams to generate one or more serialized debug data streams, e.g., containing both hardware and software debug data, for output to off-chip debug testing equipment to support debug testing of both the ASIC logic and the programmable processor. Cross triggering can be implemented on-chip to support simultaneous display of correlated hardware and software debug information on appropriate monitors. The present invention supports debug testing using external debug testing equipment that does not require a hardware logic analyzer.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: December 29, 2009
    Assignee: Agere Systems Inc.
    Inventors: Bernhard Laschinsky, Neil C. Puthuff, Francis H. Reiff, Million Woldesenbet
  • Serialization of hardware and software debug data
    Publication number: 20070240020
    Abstract: An integrated circuit (IC) having a link layer that (1) simultaneously receives both hardware debug data from on-chip ASIC logic and software debug data from an on-chip programmable processor and (2) serializes the hardware and software debug data streams to generate one or more serialized debug data streams, e.g., containing both hardware and software debug data, for output to off-chip debug testing equipment to support debug testing of both the ASIC logic and the programmable processor. Cross triggering can be implemented on-chip to support simultaneous display of correlated hardware and software debug information on appropriate monitors. The present invention supports debug testing using external debug testing equipment that does not require a hardware logic analyzer.
    Type: Application
    Filed: February 28, 2007
    Publication date: October 11, 2007
    Inventors: Bernhard Laschinsky, Neil C. Puthuff, Francis H. Reiff, Million Woldesenbet