Patents by Inventor Bernhard Schaetzler

Bernhard Schaetzler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9548248
    Abstract: According to various embodiments, a method of processing a substrate may include: forming a plurality of trenches into a substrate between two chip structures in the substrate, the trenches defining at least one pillar between the two chip structures and a sidewall on each of said two chip structures; disposing an auxiliary carrier on the substrate to hold the chip structures and the at least one pillar; at least partially filling the trenches with encapsulation material to cover the at least one pillar and the sidewalls, thereby at least partially encapsulating the chip structures; removing a portion of the encapsulation material to expose at least a portion of the at least one pillar; and at least partially removing the at least one pillar.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: January 17, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Frank Pueschner, Bernhard Schaetzler, Franz Gabler
  • Patent number: 9324642
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: April 26, 2016
    Assignee: Infineon Technologies AG
    Inventors: Frank Püschner, Bernhard Schätzler, Teck Sim Lee, Franz Gabler, Pei Pei Kong, Boon Huat Lim
  • Publication number: 20160042998
    Abstract: According to various embodiments, a method of processing a substrate may include: forming a plurality of trenches into a substrate between two chip structures in the substrate, the trenches defining at least one pillar between the two chip structures and a sidewall on each of said two chip structures; disposing an auxiliary carrier on the substrate to hold the chip structures and the at least one pillar; at least partially filling the trenches with encapsulation material to cover the at least one pillar and the sidewalls, thereby at least partially encapsulating the chip structures; removing a portion of the encapsulation material to expose at least a portion of the at least one pillar; and at least partially removing the at least one pillar.
    Type: Application
    Filed: August 7, 2014
    Publication date: February 11, 2016
    Inventors: Frank Pueschner, Bernhard Schaetzler, Franz Gabler
  • Publication number: 20150130037
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 14, 2015
    Inventors: Frank Püschner, Bernhard Schätzler, Teck Sim Lee, Franz Gabler, Pei Pei Kong, Boon Huat Lim
  • Patent number: 7456495
    Abstract: An electronic semiconductor module component with a semiconductor stack includes semiconductor components arranged in a vertically stacked relationship. A basic semiconductor component includes a lower interposing unit, on which lower external contact pads are arranged. The basic semiconductor component further includes an upper interposing unit, on which upper external contact pads are arranged. The two interposing units are electrically connected to one another via bonding connections disposed at their edge areas. The basic semiconductor component is a compact component on which different, customer-specific semiconductor components can be stacked.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: November 25, 2008
    Assignee: Infineon Technologies AG
    Inventors: Jens Pohl, Bernd Roemer, Bernhard Schaetzler, Christian Stuempfl, Herman Vilsmeier, Holger Woerner, Bernhard Zuhr
  • Publication number: 20070018308
    Abstract: An electronic component includes a substrate with outer contact areas including copper. Lead-free solder bumps are disposed on the outer contact areas of the electronic component. An electronic configuration includes an electronic component and a printed circuit board. The electronic component is mounted on the printed circuit board by lead-free solder electrical connections.
    Type: Application
    Filed: March 14, 2006
    Publication date: January 25, 2007
    Inventors: Albert Schott, Bernd Rakow, Bernd Waidhas, Juergen Walter, Christian Birzer, Rainer Steiner, Bernhard Schaetzler, Thomas Ort, Gerald Bock
  • Publication number: 20050133932
    Abstract: An electronic semiconductor module component with a semiconductor stack includes semiconductor components arranged in a vertically stacked relationship. A basic semiconductor component includes a lower interposing unit, on which lower external contact pads are arranged. The basic semiconductor component further includes an upper interposing unit, on which upper external contact pads are arranged. The two interposing units are electrically connected to one another via bonding connections disposed at their edge areas. The basic semiconductor component is a compact component on which different, customer-specific semiconductor components can be stacked.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 23, 2005
    Inventors: Jens Pohl, Bernd Roemer, Bernhard Schaetzler, Christian Stuempfl, Herman Vilsmeier, Holger Woerner, Bernhard Zuhr
  • Patent number: 6870245
    Abstract: The invention relates to an electronic component having an integrated circuit being packaged in a housing. The electronic component is adhesively bonded to an island of a leadframe, the island being designed to accommodate the integrated circuit and being dimensionally adapted to the base surface of the integrated circuit in order to minimize and prevent housing deformations.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: March 22, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventors: Bernhard Schätzler, Georg Ernst
  • Patent number: 6774479
    Abstract: The invention relates to an electronic device having a semiconductor chip and a leadframe. The leadframe has a flat conductor frame. A semiconductor chip connection plate is configured in the center of the flat conductor frame. The semiconductor chip connection plate is structured by elongate openings all around the position of the semiconductor chip to form an island that carries the semiconductor chip and a ring that surrounds the island. Furthermore, the invention relates to a method for producing such an electronic device and to a corresponding leadframe.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Bernhard Schätzler, Georg Ernst, Tan Loon Lee