Patents by Inventor Bernhard Strzalkowski

Bernhard Strzalkowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12334914
    Abstract: The present disclosure provides techniques for predicting failure of power switches and taking action based on the predictions. In an example, a method can include controlling the at least two parallel-connected power switches via a first driver and a second driver, the first a second driver responsive to a single command signal, measuring a failure characteristic of a first power switch, and disabling a first driver of the first power switch when the first failure characteristic exceeds a failure precursor threshold.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: June 17, 2025
    Assignee: Analog Devices International Unlimited Company
    Inventor: Bernhard Strzalkowski
  • Patent number: 12328106
    Abstract: Various examples are directed to a circuit for biasing a power amplifier (PA). The circuit may comprise a first isolated power supply comprising a first DC output and a first common output as well as a second isolated power supply comprising a second DC output and a second common output. The second DC output may be electrically coupled to the first common output. The circuit may also comprise a switch network that is configurable to a first state in which the first DC output is provided at a circuit output and to a second state in which the second DC output is provided at the circuit output.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: June 10, 2025
    Assignee: Analog Devices International Unlimited Company
    Inventors: Qingyi Huang, Yong Zhang, Mark Cope, Bernhard Strzalkowski
  • Publication number: 20240235381
    Abstract: In a first aspect, there is provided a method of controlling a power converter or a power inverter, comprising: using a comparator to detect a negative voltage drop at a gate of a passive switch device, the negative voltage drop being indicative of an active switch device turning off; applying an adjustment time to a predetermined turn on time of the passive switch device so as to reduce the resultant dead time; and turning on the passive device once the resultant dead time has elapsed.
    Type: Application
    Filed: November 7, 2023
    Publication date: July 11, 2024
    Applicant: Analog Devices International Unlimited Company
    Inventor: Bernhard Strzalkowski
  • Publication number: 20230361731
    Abstract: Various examples are directed to a circuit for biasing a power amplifier (PA). The circuit may comprise a first isolated power supply comprising a first DC output and a first common output as well as a second isolated power supply comprising a second DC output and a second common output. The second DC output may be electrically coupled to the first common output. The circuit may also comprise a switch network that is configurable to a first state in which the first DC output is provided at a circuit output and to a second state in which the second DC output is provided at the circuit output.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Inventors: Qingyi Huang, Yong Zhang, Mark Cope, Bernhard Strzalkowski
  • Patent number: 11736072
    Abstract: Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: August 22, 2023
    Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
    Inventor: Bernhard Strzalkowski
  • Patent number: 11695070
    Abstract: A power device can be structured with a power switch having multiple arrangements such that the power switch can operate as a power switch with the capability to measure properties of the power switch. An example power device can comprise a main arrangement of transistor cells and a sensor arrangement of sensor transistor cells. The main arrangement can be structured to operate as a power switch, with the transistor cells of the main arrangement having control nodes connected in parallel to receive a common control signal. The sensor arrangement of sensor transistor cells can be structured to measure one or more parameters of the main arrangement, with the sensor transistor cells having sensor control nodes connected in parallel to receive a common sensor control signal. The sensor transistor cells can have a common transistor terminal shared with a common transistor terminal of the transistor cells of the main arrangement.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: July 4, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Bernhard Strzalkowski
  • Publication number: 20230188129
    Abstract: The present disclosure provides techniques for predicting failure of power switches and taking action based on the predictions. In an example, a method can include controlling the at least two parallel-connected power switches via a first driver and a second driver, the first a second driver responsive to a single command signal, measuring a failure characteristic of a first power switch, and disabling a first driver of the first power switch when the first failure characteristic exceeds a failure precursor threshold.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 15, 2023
    Inventor: Bernhard Strzalkowski
  • Patent number: 11545971
    Abstract: The present disclosure provides techniques for predicting failure of power switches and taking action based on the predictions. In an example, a method can include controlling the at least two parallel-connected power switches via a first driver and a second driver, the first a second driver responsive to a single command signal, measuring a failure characteristic of a first power switch, and disabling a first driver of the first power switch when the first failure characteristic exceeds a failure precursor threshold.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 3, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventor: Bernhard Strzalkowski
  • Publication number: 20210265956
    Abstract: Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Applicant: Analog Devices International Unlimited Company
    Inventor: Bernhard STRZALKOWSKI
  • Publication number: 20210210629
    Abstract: A power device can be structured with a power switch having multiple arrangements such that the power switch can operate as a power switch with the capability to measure properties of the power switch. An example power device can comprise a main arrangement of transistor cells and a sensor arrangement of sensor transistor cells. The main arrangement can be structured to operate as a power switch, with the transistor cells of the main arrangement having control nodes connected in parallel to receive a common control signal. The sensor arrangement of sensor transistor cells can be structured to measure one or more parameters of the main arrangement, with the sensor transistor cells having sensor control nodes connected in parallel to receive a common sensor control signal. The sensor transistor cells can have a common transistor terminal shared with a common transistor terminal of the transistor cells of the main arrangement.
    Type: Application
    Filed: January 8, 2021
    Publication date: July 8, 2021
    Inventor: Bernhard Strzalkowski
  • Publication number: 20210184666
    Abstract: The present disclosure provides techniques for predicting failure of power switches and taking action based on the predictions. In an example, a method can include controlling the at least two parallel-connected power switches via a first driver and a second driver, the first a second driver responsive to a single command signal, measuring a failure characteristic of a first power switch, and disabling a first driver of the first power switch when the first failure characteristic exceeds a failure precursor threshold.
    Type: Application
    Filed: December 17, 2019
    Publication date: June 17, 2021
    Inventor: Bernhard Strzalkowski
  • Patent number: 11005431
    Abstract: Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: May 11, 2021
    Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
    Inventor: Bernhard Strzalkowski
  • Patent number: 10948359
    Abstract: Techniques for determining a temperature measurement of a junction of a power switch are described. A current can be applied to a control node, e.g., gate terminal, of the power switch, such as a field-effect transistor (FET) or an insulated-gate bipolar transistor (IGBT), while the power switch is in a steady-state region in which a gate-to-source voltage (e.g., FET) or a gate-to-emitter voltage (e.g., IGBT) of the power switch is constant. While in the steady-state region, the temperature measurements can be performed, thereby ensuring accuracy of the measurement.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: March 16, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventor: Bernhard Strzalkowski
  • Publication number: 20200321922
    Abstract: Herein disclosed in some embodiments is a fault detector for power amplifiers of a communication system. The fault detector can detect a portion of the power amplifiers that are in fault condition and can prevent or limit current flow to the power amplifiers in fault condition while allowing the rest of the power amplifiers to operate normally. The fault detector can further indicate which power amplifiers are in fault condition and/or the cause for the power amplifiers to be in fault condition. Based on the indication, a controller can direct communications away from the power amplifiers in fault condition and/or perform operations to correct the fault condition.
    Type: Application
    Filed: April 3, 2019
    Publication date: October 8, 2020
    Applicant: Analog Devices International Unlimited Company
    Inventor: Bernhard STRZALKOWSKI
  • Publication number: 20200132557
    Abstract: Techniques for determining a temperature measurement of a junction of a power switch are described. A current can be applied to a control node, e.g., gate terminal, of the power switch, such as a field-effect transistor (FET) or an insulated-gate bipolar transistor (IGBT), while the power switch is in a steady-state region in which a gate-to-source voltage (e.g., FET) or a gate-to-emitter voltage (e.g., IGBT) of the power switch is constant. While in the steady-state region, the temperature measurements can be performed, thereby ensuring accuracy of the measurement.
    Type: Application
    Filed: October 30, 2018
    Publication date: April 30, 2020
    Inventor: Bernhard Strzalkowski
  • Patent number: 10419251
    Abstract: An isolator includes a transmitter, a coupling module and a receiver. The transmitter drives an input of the coupling module in response to a digital signal, such that in response to a first type of digital data value in the digital signal, a signal of a first predetermined type is supplied to the input and in response to a second type of digital data value in the digital signal, a signal of a second predetermined type is supplied to the input, the signals of the first type and the second type each including an initiation signal that announces a time window during which another portion of the signals representing a digital data value of the first type or the second type will be valid. The receiver is coupled to an output of the coupling module to receive and to decode signals in correspondence to the signals provided to the input.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: September 17, 2019
    Assignee: INFINEON TECHNOLOGIES
    Inventor: Bernhard Strzalkowski
  • Patent number: 9859803
    Abstract: A transformer based isolated bi-directional DC-DC power converter may have signals for controlling power transfer in first and second directions are derived from the same side of the transformer. The converter may include a transformer, a first switching circuit, a second switching circuit, and a controller. In a first mode, the controller controls the first and second switching circuits, and power is transferred from a first side to a second side. In a second mode, the controller controls the first and second switching circuits, and power is transferred from the second side to the first side.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: January 2, 2018
    Assignee: Analog Devices Global
    Inventor: Bernhard Strzalkowski
  • Patent number: 9590517
    Abstract: A multilevel DC-DC converter includes a voltage source that provides a voltage Vout1 to at least one charge converter circuit and an output filter capacitor having an associated output voltage Vout2. The at least one charge converter circuit includes a transformer having at least one primary winding and at least two secondary windings, a primary and secondary circuit each having at least two switching elements, and a control unit which receives a control signal, such as but not limited to an envelope tracking signal, which represents a desired output voltage. The control unit is arranged to provide output control signals to the respective switching elements of the primary and secondary circuits to activate and deactivate the respective switching elements to obtain a desired output voltage Vout2. The multilevel DC-DC converter can be arranged to operate as a boost converter or as a buck-boost converter.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: March 7, 2017
    Assignee: Analog Devices, Inc.
    Inventor: Bernhard Strzalkowski
  • Patent number: 9531369
    Abstract: Disclosed is a circuit arrangement for generating a drive signal for a transistor. In one embodiment, the circuit arrangement includes a control circuit that receives a switching signal, a driver circuit that outputs a drive signal, and at least one transmission channel. The control circuit transmits, depending on the switching signal for each switching operation of the transistor, switching information and switching parameter information via the transmission channel to the driver circuit. The driver circuit generates the drive signal depending on the switching information and depending on the switching parameter information.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: December 27, 2016
    Assignee: Infineon Technologies Austria AG
    Inventor: Bernhard Strzalkowski
  • Patent number: 9455704
    Abstract: A circuit for a semiconductor switching element including a transformer. One embodiment provides a first voltage supply circuit having a first oscillator. A first transformer is connected downstream of the first oscillator. A first accumulation circuit for providing a first supply voltage is connected downstream of the first transformer. A driver circuit having input terminals for feeding in the first supply voltage and having output terminals for providing a drive voltage for the semiconductor switching element, designed to generate the drive voltage for the semiconductor switching element at least from the first supply voltage.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: September 27, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Marcus Nuebling, Jens Barrenscheen, Bernhard Strzalkowski