Patents by Inventor Bernhard Wicht
Bernhard Wicht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7907015Abstract: An electronic device includes an operational amplifier, with the operational amplifier having an amplifier input stage coupled with a first output node to an amplifier output stage. A compensation capacitance is connected between an output node of the amplifier output stage and the first output node of the amplifier input stage, thereby operating as a compensator for stabilizing the operational amplifier. The compensation capacitance provides a parasitic diode drawing a first leakage current from the first output node of the amplifier input stage, a leakage current compensation circuit being coupled to the first output node of the amplifier input stage and coupled to a second output node of the amplifier input stage for drawing a first current from the first output node and a second current from the second output node. The leakage current compensation circuit is adapted such that the second current is greater than the first current by an amount corresponding to the first leakage current.Type: GrantFiled: October 10, 2008Date of Patent: March 15, 2011Assignee: Texas Instruments Deutschland GmbHInventors: Marcin Augustyniak, Bernhard Wicht
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Publication number: 20110037509Abstract: An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level output signal of a second voltage domain. The first level shifter comprises a storing element in the second voltage domain, an input stage coupled to the storing element for providing a signal state to be stored in the storing element and a feedback loop from an output of the storing element to the input stage for controlling the input stage in response to a transition of a high level output signal of the storing element.Type: ApplicationFiled: August 12, 2010Publication date: February 17, 2011Applicant: Texas Instruments Deutschland GmbHInventors: Stefan Herzer, Ferdinand Stettner, Bernhard Wicht
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Publication number: 20100264981Abstract: With conventional charge pumps, significant noise is present due at least in part to large changes in the supply current. To combat this problem, a charge pump is provided that includes a number of stages. These stages are coupled to receive periodic alternating voltages having a phase shift with respect to each other so that the changes in the supply current are reduced, which reduces noise.Type: ApplicationFiled: February 23, 2010Publication date: October 21, 2010Applicant: Texas Instruments Deutschland GmbHInventors: Marcin K. Augustyniak, Bernhard Wicht
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Patent number: 7812646Abstract: An integrated electronic device includes a sample and hold stage. The sample and hold stage has a sampling capacitor (C) for an input voltage at an input node (Vin), a first switch (S1) coupled between the input node (Vin) and the sampling capacitor (C) for connecting the input node (Vin) to the sampling capacitor (C). There is also a voltage follower with an input coupled to the sampling capacitor (C). The first switch (S1) includes a first MOS transistor (NM1) coupled between the input node (Vin) and the sampling capacitor (C). The first MOS transistor has a bulk. The sample and hold stage is adapted to selectively couple the bulk to a node having a voltage level (V3) which is equal or close to the voltage level at the input node of the voltage follower.Type: GrantFiled: October 10, 2008Date of Patent: October 12, 2010Assignee: Texas Instruments Deutschland GmbHInventors: Marcin K. Augustyniak, Bernhard Wicht, Ingo Hehemann
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Publication number: 20100231187Abstract: An electronic device for switched mode DC-DC conversion is provided that includes a stage for sensing an output current causing a voltage difference between a first and a second node. The current sensing stage includes a comparator being capacitively coupled with a first input to the first node and with a second input to the second node for determining a magnitude of the output current.Type: ApplicationFiled: March 10, 2010Publication date: September 16, 2010Applicant: Texas Instruments Deutschland GmbHInventors: Bernhard Wicht, Sumeet P. Kulkarni, Stefan Herzer, Jochen Neidhardt
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Publication number: 20100148875Abstract: An electronic device includes an operational amplifier, with the operational amplifier having an amplifier input stage coupled with a first output node to an amplifier output stage. A compensation capacitance is connected between an output node of the amplifier output stage and the first output node of the amplifier input stage, thereby operating as a compensator for stabilizing the operational amplifier. The compensation capacitance provides a parasitic diode drawing a first leakage current from the first output node of the amplifier input stage, a leakage current compensation circuit being coupled to the first output node of the amplifier input stage and coupled to a second output node of the amplifier input stage for drawing a first current from the first output node and a second current from the second output node. The leakage current compensation circuit is adapted such that the second current is greater than the first current by an amount corresponding to the first leakage current.Type: ApplicationFiled: October 10, 2008Publication date: June 17, 2010Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Marcin Augustyniak, Bernhard Wicht
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Patent number: 7724046Abstract: An integrated circuit device for switching electrical loads that have an inductive component comprises at least one switching channel that includes a power stage with a power MOS transistor and a driver circuit for driving the gate of the power MOS transistor, the switching stage being configurable for use in either of a High Side configuration and a Low Side configuration.Type: GrantFiled: May 22, 2007Date of Patent: May 25, 2010Assignee: Texas InstrumentsDeutschland GmbHInventors: Michael Wendt, Lenz Thoma, Bernhard Wicht
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Publication number: 20090153198Abstract: An integrated electronic device includes a sample and hold stage. The sample and hold stage has a sampling capacitor (C) for an input voltage at an input node (Vin), a first switch (S1) coupled between the input node (Vin) and the sampling capacitor (C) for connecting the input node (Vin) to the sampling capacitor (C). There is also a voltage follower with an input coupled to the sampling capacitor (C). The first switch (S1) includes a first MOS transistor (NM1) coupled between the input node (Vin) and the sampling capacitor (C). The first MOS transistor has a bulk. The sample and hold stage is adapted to selectively couple the bulk to a node having a voltage level (V3) which is equal or close to the voltage level at the input node of the voltage follower.Type: ApplicationFiled: October 10, 2008Publication date: June 18, 2009Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Marcin K. Augustyniak, Bernhard Wicht, Ingo Hehemann
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Publication number: 20090153226Abstract: An electronic device has circuitry for driving a high side switch. The circuitry has a high side driver including a first switch and a second switch being coupled to each other by a driver output node. The driver output node is adapted to be coupled to a control input of the high side switch. The first switch is coupled to a driver high voltage level and the second switch is coupled to ground for alternately pulling the driver output node to either the driver high voltage level or to ground so as to turn the high side switch on and off. A diode element is coupled between the driver output node and the second switch in a forward direction from the driver output node to the switch.Type: ApplicationFiled: October 16, 2008Publication date: June 18, 2009Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Bernhard Wicht, Michael Wendt
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Patent number: 7504695Abstract: An SRAM memory cell has at least one memory node and at least one selection transistor, which is electrically connected to the memory node, a first bit line and a first word line. Furthermore, the SRAM memory cell has means for compensating for a leakage current flowing into the SRAM memory cell. The means are designed in such a way that a current corresponding to the leakage current flows into the SRAM memory cell. In one exemplary embodiment, the means are formed as a transistor which is electrically connected to the first bit line and the second memory node, the first memory node being connected to the selection transistor.Type: GrantFiled: May 25, 2005Date of Patent: March 17, 2009Assignee: Infineon Technologies AGInventors: Yannick Martelloni, Thomas Nirschl, Bernhard Wicht
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Publication number: 20070290738Abstract: An integrated circuit device for switching electrical loads that have an inductive component comprises at least one switching channel that includes a power stage with a power MOS transistor and a driver circuit for driving the gate of the power MOS transistor, the switching stage being configurable for use in either of a High Side configuration and a Low Side configuration.Type: ApplicationFiled: May 22, 2007Publication date: December 20, 2007Applicant: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Michael Wendt, Lenz Thoma, Bernhard Wicht
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Patent number: 7099218Abstract: A differential current evaluation circuit has a differential amplifier and a circuit for setting an input resistance of the current evaluation circuit. The circuit is connected to the outputs and the inputs of the differential amplifier and to signal lines. A sense amplifier circuit has a circuit section, in which a signal is available at an output in a temporally continuous manner even if, after the deactivation of the circuit connected upstream, a signal, in particular a signal supplied by the current evaluation circuit, is no longer present at its input. The differential current evaluation circuit and the sense amplifier circuit are disposed in a circuit configuration for reading out and evaluating a memory state of a semiconductor memory cell. The current evaluation circuit can be activated by a circuit section for automatic deactivation before a read operation and be automatically deactivated directly after the read operation has ended.Type: GrantFiled: May 2, 2003Date of Patent: August 29, 2006Assignee: Infineon Technologies AGInventors: Bernhard Wicht, Doris Schmitt-Landsiedel, Jean-Yves Larguier
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Publication number: 20050281109Abstract: An SRAM memory cell has at least one memory node and at least one selection transistor, which is electrically connected to the memory node, a first bit line and a first word line. Furthermore, the SRAM memory cell has means for compensating for a leakage current flowing into the SRAM memory cell. The means are designed in such a way that a current corresponding to the leakage current flows into the SRAM memory cell. In one exemplary embodiment, the means are formed as a transistor which is electrically connected to the first bit line and the second memory node, the first memory node being connected to the selection transistor.Type: ApplicationFiled: May 25, 2005Publication date: December 22, 2005Inventors: Yannick Martelloni, Thomas Nirschl, Bernhard Wicht
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Publication number: 20030218481Abstract: A differential current evaluation circuit has a differential amplifier and a circuit for setting an input resistance of the current evaluation circuit. The circuit is connected to the outputs and the inputs of the differential amplifier and to signal lines. A sense amplifier circuit has a circuit section, in which a signal is available at an output in a temporally continuous manner even if, after the deactivation of the circuit connected upstream, a signal, in particular a signal supplied by the current evaluation circuit, is no longer present at its input. The differential current evaluation circuit and the sense amplifier circuit are disposed in a circuit configuration for reading out and evaluating a memory state of a semiconductor memory cell. The current evaluation circuit can be activated by a circuit section for automatic deactivation before a read operation and be automatically deactivated directly after the read operation has ended.Type: ApplicationFiled: May 2, 2003Publication date: November 27, 2003Inventors: Bernhard Wicht, Doris Schmitt-Landsiedel, Jean-Yves Larguier
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Patent number: 6512713Abstract: An electronic amplifier circuit according to the principle of current detection is coupled to a memory cell field and has an input transistor for each respective row or column of the matrix array. The input transistor is connected to the respective row or column and can be driven and switched by a control signal of a multiplexer circuit. The amplifier circuit may be constructed as a gate circuit or as a transistor diode circuit. A matrix array of memory cells and a matrix array of photodetectors are also provided.Type: GrantFiled: August 27, 2001Date of Patent: January 28, 2003Assignee: Infineon Technologies AGInventors: Steffen Paul, Bernhard Wicht
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Patent number: 6466500Abstract: An amplifier circuit configuration includes a data line for transmitting a data signal. The data line is connected to a data signal input of an amplifier by way of a switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier with a terminal for a control signal. The terminal for the control signal of the control circuit is connected, parallel to the switching device, to the data line. As a consequence, a switching device, which is connected between the data line and the amplifier, has only little influence on the dynamic response when reading out a data signal.Type: GrantFiled: May 14, 2001Date of Patent: October 15, 2002Assignee: Infineon Technologies AGInventors: Bernhard Wicht, Steffen Paul
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Publication number: 20020025617Abstract: An electronic amplifier circuit according to the principle of current detection is coupled to a memory cell field and has an input transistor for each respective row or column of the matrix array. The input transistor is connected to the respective row or column and can be driven and switched by a control signal of a multiplexer circuit. The amplifier circuit may be constructed as a gate circuit or as a transistor diode circuit. A matrix array of memory cells and a matrix array of photodetectors are also provided.Type: ApplicationFiled: August 27, 2001Publication date: February 28, 2002Inventors: Steffen Paul, Bernhard Wicht
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Publication number: 20010043119Abstract: An amplifier circuit configuration includes a data line for transmitting a data signal. The data line is connected to a data signal input of an amplifier by way of a switching device. The amplifier includes a control circuit for controlling an input resistance of the amplifier with a terminal for a control signal. The terminal for the control signal of the control circuit is connected, parallel to the switching device, to the data line. As a consequence, a switching device, which is connected between the data line and the amplifier, has only little influence on the dynamic response when reading out a data signal.Type: ApplicationFiled: May 14, 2001Publication date: November 22, 2001Inventors: Bernhard Wicht, Steffen Paul