Abstract: An echo canceller circuit contains a network of capacitors binary-stepped in their capacitance, whose one set of plates, representing a center of the network, each are switchably connectable to a reference potential or, in the case of less significant bits of digital information to be converted, to ground potential, or to a fraction (U3, U4) of the reference potential. To avoid difficulties which might result from the offset voltage of an integrated operational amplifier (V) connected to the capacitor network, the network is composed of two symmetrical halves (COo' to C32o; COn' to 32n).

Abstract: In a process of digital to analog conversion, use is made of a network comprising capacitors (C through C'/16) which are binary-stepped in their capacitance, and whose lower terminals, depending upon the binary value of the allocated bit of a digital signal to be converted, are switchable to a reference voltage source (V.sub.ref) or to ground potential and thus either codetermine or do not codetermine the value of the network output voltage representing the analog signal. In order to achieve a monotonic and possibly linear converter characteristic when converting into bipolar signals, the network is so switched that, when generating positive and negative analog values of the same order, it always involves the same capacitors, and no additional capacitor is required for change redistribution.

Abstract: An operational amplifier of the folded-cascode type with: push-pull output terminals; a differential-input transistors; a load impedance in the form of a cascode current source coupled to the differential-input, and a dynamic common-mode negative feedback. A current source transistor in the cascode current source is incorporated into the dynamic common-mode negative feedback.

Abstract: A pulse shaper forms multi-level signals with staircase-shaped level transitions. The formation of these staircase-shaped level transitions takes place through charge exchange between a plurality of connected, component charge-forming charging capacitors and a summing capacitor adding the component charges.

Abstract: The exemplary embodiments concern reference sources for A/D and D/A converters, for example of a PCM telephone exchange system. Two separated stages which are supplied however from the same direct current supply source, contain in each case the series circuiting of at least one IG-FET and at least one load resistor. Between the taps of the stages, a differential voltage appears, which is used itself directly as a reference voltage, or indirectly is used for the setting of the value of a reference voltage, or of a reference current, for example by a voltage divider. The value of the reference voltage, or of the reference current, is also exactly adjustable after production of integrated modules, because in at least one of the two stages, at least one of the IG-FETs contains a memory gate which is at least partially applied between the controllable control gate and the channel area, is on all sides surrounded by an insulator, and thus is floating in the electrical sense.

Abstract: An erasible programmable read-only memory employing an n-chanel memory FET. A MOSFET is used having a floating memory gate which includes erasing projections ("tongues") on the floating memory gate. One tongue covers the drain and the other tongue covers the source. Erasing occurs bit-wise via the drain-side tongue; erasing word-wise or matrix-wise via the source-side tongue. Bit-wise, word-wise and matrix-wise erasing is obtained as desired. It is applicable for REPROM chips, and in particular, for programmable memories of miniature calculators.

Abstract: N-channel memory FET has only one erasing projection ("tongue") on the floating memory gate. The tongue covers a special transfer region in the substrate, insulated from drain and source. The erasing of the memory gate occurs via this transfer region. There is separation of transfer region potential and source/drain potential.Applicable for erasible-programmable read only memory chips and, in particular, for program memories of miniature calculators.