Patents by Inventor Berry A. J. Buter

Berry A. J. Buter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8198756
    Abstract: The invention relates to a voltage-boosting stage (100) comprising a first capacitive voltage circuit (S1, S2, S3, S4, C0, Cb) coupled to a power supply (Vs) and providing an output voltage at an output terminal. The voltage-boosting stage further comprises a second capacitive voltage circuit (S5, S6, S7, S8, C1, Cb) coupled to a power supply (Vs) and providing another output voltage at another output terminal the output terminal and the other terminals being coupled together and further coupled to a supply terminal of a power stage (S9, S10) for implementing a two-level boosted power stage.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: June 12, 2012
    Assignee: NXP B.V.
    Inventors: Berry A. J. Buter, Alexandre Huffenus
  • Patent number: 8049561
    Abstract: The invention refers to an amplifier (1) comprising a switchable capacitive divider (10) for dividing a supply voltage delivered to the amplifier (1), the switchable capacitive divider being coupled to a coupling circuit (15) via a first wire and a second wire, the coupling circuit determining a connection path between said first and second wire and a first capacitor (C2) and a switchable power circuit (20).
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: November 1, 2011
    Assignee: NXP B.V.
    Inventors: Berry A. J. Buter, Andrianus J. M. Van Tuijl
  • Publication number: 20100090764
    Abstract: The invention refers to an amplifier (1) comprising a switchable capacitive divider (10) for dividing a supply voltage delivered to the amplifier (1), the switchable capacitive divider being coupled to a coupling circuit (15) via a first wire and a second wire, the coupling circuit determining a connection path between said first and second wire and a first capacitor (C2) and a switchable power circuit (20).
    Type: Application
    Filed: October 19, 2007
    Publication date: April 15, 2010
    Applicant: NXP, B.V.
    Inventors: Berry A. J. Buter, Andrianus J. M. Van Tuijl
  • Publication number: 20100038972
    Abstract: The invention relates to a voltage-boosting stage (100) comprising a first capacitive voltage circuit (S1, S2, S3, S4, CO, Cb) coupled to a power supply (Vs) and providing an output voltage at an output terminal. The voltage-boosting stage further comprises a second capacitive voltage circuit (S5, S6, S7, S8, C1, Cb) coupled to a power supply (Vs) and providing another output voltage at another output terminal the output terminal and the other terminals being coupled together and further coupled to a supply terminal of a power stage (S9, S1O) for implementing a two-level boosted power stage.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 18, 2010
    Applicant: NXP, B.V.
    Inventors: Berry A. J. Buter, Alexandre Huffenus