Patents by Inventor Bert Reents

Bert Reents has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12245383
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: March 4, 2025
    Assignee: Atotech Deutschland GmbH & Co. KG
    Inventors: Bert Reents, Akif Özkök, Soungsoo Kim, Horst Brüggmann, Herwig Josef Berthold, Marcin Klobus, Thomas Schiwon, Marko Mirkovic
  • Publication number: 20240341042
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.
    Type: Application
    Filed: June 18, 2024
    Publication date: October 10, 2024
    Applicant: Atotech Deutschland GmbH & Co. KG
    Inventors: Bert REENTS, Akif ÖZKÖK, Soungsoo KIM, Horst BRÜGGMANN, Herwig Josef BERTHOLD, Marcin KLOBUS, Thomas SCHIWON, Marko MIRKOVIC
  • Patent number: 12063751
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) including microvias filled with copper comprising the steps of: a1) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a cover layer, and (iii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b1) depositing a conductive layer; or a2) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b2) depositing a conductive layer; and c) electrodepositing a copper filling in the microvia and a first copper layer on the conductive layer which form together a planar surface and the thickness of the first copper layer is from 0.1 to 3 ?m.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: August 13, 2024
    Assignee: Atotech Deutschland GmbH & Co. KG
    Inventors: Akif Özkök, Bert Reents, Mustafa Özkök, Marko Mirkovic, Markus Youkhanis, Horst Brüggmann, Sven Lamprecht, Kai-Jens Matejat
  • Publication number: 20220304164
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) including microvias filled with copper comprising the steps of: a1) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a cover layer, and (iii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b1) depositing a conductive layer; or a2) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b2) depositing a conductive layer; and c) electrodepositing a copper filling in the microvia and a first copper layer on the conductive layer which form together a planar surface and the thickness of the first copper layer is from 0.1 to 3 ?m.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 22, 2022
    Inventors: Akif ÖZKÖK, Bert REENTS, Mustafa ÖZKÖK, Marko MIRKOVIC, Markus YOUKHANIS, Horst BRÜGGMANN, Sven LAMPRECHT, Kai-Jens MATEJAT
  • Publication number: 20220279662
    Abstract: The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.
    Type: Application
    Filed: August 19, 2020
    Publication date: September 1, 2022
    Inventors: Bert REENTS, Akif ÖZKÖK, Soungsoo KIM, Horst BRÜGGMANN, Herwig Josef BERTHOLD, Marcin KLOBUS, Thomas SCHIWON, Marko MIRKOVIC
  • Patent number: 9526183
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: December 20, 2016
    Assignee: Atotech Deutschland GmbH
    Inventors: Bert Reents, Thomas Pliet, Bernd Roelfs, Toshiya Fujiwara, Rene Wenzel, Markus Youkhanis, Soungsoo Kim
  • Publication number: 20160270241
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper.
    Type: Application
    Filed: May 20, 2016
    Publication date: September 15, 2016
    Inventors: Bert REENTS, Thomas PLIET, Bernd ROELFS, Toshiya FUJIWARA, Rene WENZEL, Markus YOUKHANIS, Soungsoo KIM
  • Patent number: 9445510
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper. The process comprises the following steps: (i) formation of a narrow part in the center of a through-hole by electroplating; and (ii) filling the through-hole obtained in step (i) with metal by electroplating.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: September 13, 2016
    Assignee: Atotech Deutschland GmbH
    Inventors: Bert Reents, Thomas Pliet, Bernd Roelfs, Toshiya Fujiwara, Rene Wenzel, Markus Youkhanis, Soungsoo Kim
  • Patent number: 8784634
    Abstract: Disclosed is an electroplating method for filling cavities, through holes, blind holes, or micro blind holes of a work piece with metals. According to said method, the work piece containing cavities, through holes, blind holes, or micro blind holes is brought in contact with a metal deposition electrolyte, and a voltage is applied between the work piece and at least one anode such that a current flow is fed to the work piece. The invention method is characterized in that the electrolyte encompasses a redox system.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: July 22, 2014
    Assignee: Atotech Deutschland GmbH
    Inventors: Bert Reents, Bernd Roelfs, Tafadzwa Magaya, Markus Youkhanis, René Wenzel, Soungsoo Kim
  • Patent number: 7767065
    Abstract: A problem during electrolytic treatment of printed circuit boards having a very thin basic metallization is that the treatment yields irregular results in various regions on the surface of the printed circuit board. In overcoming this problem the invention provides a device for electrolytically treating an at least superficially electrically conducting work piece having at least two substantially opposing side edges. The device comprises current supply devices for the work piece, said current supply devices each comprising contact strips located on the opposing side edges which are capable of electrically contacting the work piece at the substantially opposing side edges.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: August 3, 2010
    Assignee: Atotech Deutschland GmbH
    Inventors: Reinhard Schneider, Stephan Kenny, Torsten Küssner, Wolfgang Plöse, Bert Reents, Heribert Streup
  • Publication number: 20090301889
    Abstract: Disclosed is an electroplating method for filling cavities, through holes, blind holes, or micro blind holes of a work piece with metals. According to said method, the work piece containing cavities, through holes, blind holes, or micro blind holes is brought in contact with a metal deposition electrolyte, and a voltage is applied between the work piece and at least one anode such that a current flow is fed to the work piece. The invention method is characterized in that the electrolyte encompasses a redox system.
    Type: Application
    Filed: March 30, 2007
    Publication date: December 10, 2009
    Applicant: ATOTECH DEUTSCHLAND GMBH
    Inventors: Bert Reents, Bernd Roelfs, Tafadzwa Magaya, Markus Youkhanis, Rene Wenzel, Soungsoo Kim
  • Publication number: 20090236230
    Abstract: The present invention relates to a galvanic process for filling through-holes with metals. The process is particularly suitable for filling through-holes of printed circuit boards with copper.
    Type: Application
    Filed: August 30, 2005
    Publication date: September 24, 2009
    Inventors: Bert Reents, Thomas Pliet, Bernd Roelfs, Toshiya Fujiwara, Rene Wenzel, Markus Youkhanis, Soungsoo Kim
  • Publication number: 20060151328
    Abstract: In order to electroplate workpieces comprising high-aspect ratio holes a method is disclosed comprising the steps bringing the workpiece and at least one anode into contact with a metal plating electrolyte, and applying a voltage between the workpiece and the anodes, to the effect that a current flow is provided to the workpiece. The current flow is a pulse reverse current flow having a frequency of at most about 6 Hertz. According to the frequency each cycle time comprises at least one forward current pulse and least one reverse current pulse.
    Type: Application
    Filed: February 4, 2004
    Publication date: July 13, 2006
    Inventors: Bert Reents, Tafadzwa Magaya
  • Publication number: 20060076241
    Abstract: A problem during electrolytic treatment of printed circuit boards having a very thin basic metallization is that the treatment yields irregular results in various regions on the surface of the printed circuit board. In overcoming this problem the invention provides a device for electrolytically treating an at least superficially electrically conducting work piece having at least two substantially opposing side edges. The device comprises current supply devices for the work piece, said current supply devices each comprising contact strips located on the opposing side edges which are capable of electrically contacting the work piece at the substantially opposing side edges.
    Type: Application
    Filed: August 28, 2003
    Publication date: April 13, 2006
    Inventors: Reinhard Schneider, Stephan Kenny, Torsten Kussner, Wolfgang Plose, Bert Reents, Heribert Streup