Abstract: A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuitry that operates in a first voltage domain, a second region including second circuitry that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Abstract: A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuity that operates in a first voltage domain, a second region including second circuity that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Abstract: A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuity that operates in a first voltage domain, a second region including second circuity that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Abstract: A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuitry that operates in a first voltage domain, a second region including second circuitry that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Abstract: In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at first and second positions; first and second magnetic field sensing elements are arranged at the first and second positions, respectively, and have a first sensitivity to the first and second currents; third and fourth magnetic field sensing elements are arranged at other positions, and have a second sensitivity to the first and second currents; and the first sensitivity is less than the second sensitivity such that the first and second magnetic field sensing elements and not the third and fourth magnetic sensing elements are selected.

Abstract: In various embodiments, a Hall sensor arrangement for the redundant measurement of a magnetic field may include a first Hall sensor on a top side of a first semiconductor substrate; a second Hall sensor on a top side of a second semiconductor substrate; a carrier having a top side and an underside; wherein the first Hall sensor is arranged on the top side of the carrier and the second Hall sensor is arranged on the underside of the carrier; and wherein the measuring area of the first Hall sensor projected perpendicularly onto the carrier at least partly overlaps the measuring area of the second Hall sensor projected perpendicularly onto the carrier.

Abstract: Embodiments relate to current difference sensors, systems and methods. In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at a first position and a second position; and first and second magnetic field sensing elements arranged at the first and second positions, respectively.

Abstract: In various embodiments, a Hall sensor arrangement for the redundant measurement of a magnetic field may include a first Hall sensor on a top side of a first semiconductor substrate; a second Hall sensor on a top side of a second semiconductor substrate; a carrier having a top side and an underside; wherein the first Hall sensor is arranged on the top side of the carrier and the second Hall sensor is arranged on the underside of the carrier; and wherein the measuring area of the first Hall sensor projected perpendicularly onto the carrier at least partly overlaps the measuring area of the second Hall sensor projected perpendicularly onto the carrier.

Abstract: A method for redundantly measuring a magnetic field for a sensor arrangement including a carrier having a first side and a second side, a first sensor disposed on a first semiconductor substrate on the first side of the carrier, and a second sensor disposed on a second semiconductor substrate on the second side of the carrier, the method including: sensing a component of a magnetic field perpendicular to the carrier with the first sensor and sensing the same component of the magnetic field perpendicular to the carrier with the second sensor.

Abstract: Embodiments relate to current difference sensors, systems and methods. In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at a first position and a second position; and first and second magnetic field sensing elements arranged at the first and second positions, respectively.

Abstract: An apparatus for detecting a physical variable has a first sensor unit and a second sensor unit. The first sensor unit detects a physical variable on the basis of a first detection principle. Furthermore, the second sensor unit detects the physical variable on the basis of a second detection principle. In this case, the first detection principle differs from the second detection principle. The first sensor unit the second sensor unit are accommodated in a common housing.

Abstract: A method for redundantly measuring a magnetic field for a sensor arrangement including a carrier having a first side and a second side, a first sensor disposed on a first semiconductor substrate on the first side of the carrier, and a second sensor disposed on a second semiconductor substrate on the second side of the carrier, the method including: sensing a component of a magnetic field perpendicular to the carrier with the first sensor and sensing the same component of the magnetic field perpendicular to the carrier with the second sensor.

Abstract: In various embodiments, a Hall sensor arrangement for the redundant measurement of a magnetic field may include a first Hall sensor on a top side of a first semiconductor substrate; a second Hall sensor on a top side of a second semiconductor substrate; a carrier having a top side and an underside; wherein the first Hall sensor is arranged on the top side of the carrier and the second Hall sensor is arranged on the underside of the carrier; and wherein the measuring area of the first Hall sensor projected perpendicularly onto the carrier at least partly overlaps the measuring area of the second Hall sensor projected perpendicularly onto the carrier.

Abstract: Embodiments relate to current difference sensors, systems and methods. In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at a first position and a second position; and first and second magnetic field sensing elements arranged at the first and second positions, respectively.

Abstract: Embodiments relate to current difference sensors, systems and methods. In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at a first position and a second position; and first and second magnetic field sensing elements arranged at the first and second positions, respectively.

Abstract: Embodiments relate to current difference sensors, systems and methods. In an embodiment, a current difference sensor includes first and second conductors arranged relative to one another such that when a first current flows through the first conductor and a second current, equal to the first current, flows through the second conductor, a first magnetic field induced in the first conductor and a second magnetic field induced in the second conductor cancel each other at a first position and a second position; and first and second magnetic field sensing elements arranged at the first and second positions, respectively.

Abstract: In various embodiments, a Hall sensor arrangement for the redundant measurement of a magnetic field may include a first Hall sensor on a top side of a first semiconductor substrate; a second Hall sensor on a top side of a second semiconductor substrate; a carrier having a top side and an underside; wherein the first Hall sensor is arranged on the top side of the carrier and the second Hall sensor is arranged on the underside of the carrier; and wherein the measuring area of the first Hall sensor projected perpendicularly onto the carrier at least partly overlaps the measuring area of the second Hall sensor projected perpendicularly onto the carrier.

Abstract: An analog-digital converter includes a differential amplifier having collector resistances each being in the form of a resistance line. Node points between resistance segments of the resistance lines are in the form of output terminals. Comparators with a balanced input are provided in the same amount as the resistance segments. In each case one input of a comparator is connected to an output terminal of a first resistance line and another input of the comparator is connected to an output terminal of a second resistance line. Therefore, the same resistance value in each case acts between two output terminals, which are connected to one comparator, in the collector circuit of the differential amplifier.

Abstract: An analog/digital converter assembly includes a first analog/digital converter having N-bit resolution, operating by the parallel method and having comparators. A sample and hold element is connected upstream of the first analog/digital converter. A second analog/digital converter has M-bit resolution, operates by the parallel method and has comparators. A digital/analog converter is connected upstream of the second analog/digital converter. A subtractor is connected to the digital/analog converter and to the sample and hold element. An amplifier is connected downstream of the subtractor. Output signals of the comparators of the first analog/digital converter are provided directly with a 1.sup.x out of 2.sup.N code for triggering the digital/analog converter. The same reference voltage is applied to both the first analog/digital converter and the digital/analog converter.

Abstract: A circuit configuration includes a symmetrically constructed sample and hold amplifier. A first switchable level shifter has an input in the form of a first signal input terminal for receiving a given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. A second switchable level shifter has an input in the form of a second signal input terminal for receiving a signal complementary to the given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. The input and output signals of each of the switchable level shifters having a different constant direct voltage difference as a function of the switching state of the level shifters.