Abstract: A system and method of motor control enable improved motor control by controlling a phase winding to float or enter a high impedance state prior to activating phase detection of the phase winding. Because the phase winding floats prior to phase detection, the effect residual current coupling in such phase can be mitigated and thereby help improve motor operation.

Abstract: A spindle motor control circuit for controlling a motor; including a control circuit to control the motor during at least a low state, a pulse state and a high state, the motor braking during said low state, the control circuit receiving a flyback voltage from the motor during the pulse state and the control circuit receiving a reduced flyback voltage from the motor during the high state.

Abstract: A system and method of motor control enable improved motor control by controlling a phase winding to float or enter a high impedance state prior to activating phase detection of the phase winding. Because the phase winding floats prior to phase detection, the effect residual current coupling in such phase can be mitigated and thereby help improve motor operation.

Abstract: A lead frame for an integrated circuit includes a ground for the integrated circuit to ground the integrated circuit, the lead frame having at least one corner connected to the ground; and a connector between the corner of the lead frame and the ground located on the integrated circuit.

Abstract: The present invention includes a charge pump circuit to raise a voltage including a voltage source to generate the voltage to be raised, a pair of switches to switch the voltage to a capacitor with the first pair of switches operating during different periods of time and a second pair of switches to switch additional voltage to the capacitor with the second pair of switches operating during different periods of time.

Abstract: The present invention includes a circuit to maintain a constant voltage on a storage element such as a capacitor at the output of a regulator during an emergency power condition. It includes a detector to detect the emergency condition and to generate a fault signal in response to the emergency condition, a one-shot time delay circuit to delay the enabling of a regulator in response to the fault signal, and a second delay unit to delay the enabling of the load of a regulator to accommodate the non-zero recovery time of a regulator. These two time delay units are able to bypass the noisy switching on the fault signal so that the maintained voltage on the storage capacitor will not droop and can be reliably used for such purposes as head retract and spindle brake under a noisy power emergency situation.

Abstract: The present invention includes a charge pump circuit to raise a voltage including a voltage source to generate the voltage to be raised, a pair of switches to switch the voltage to a capacitor with the first pair of switches operating during different periods of time and a second pair of switches to switch additional voltage to the capacitor with the second pair of switches operating during different periods of time.

Abstract: A spindle motor control circuit for controlling a motor; including a control circuit to control the motor during at least a low state, a pulse state and a high state, the motor braking during said low state, the control circuit receiving a flyback voltage from the motor during the pulse state and the control circuit receiving a reduced flyback voltage from the motor during the high state.

Abstract: A circuit for providing commutation control signals to a commutator for a polyphase brushless dc motor in a mass data storage device includes an accumulator (48) to accumulate a digital count that is proportional or related to a phase difference between the commutation control signals and a motor bemf. A digital variable frequency oscillator (52) generates an oscillator output signal of frequency proportional to the digital count to reset the accumulator (68) after a predetermined time determined by the frequency. The circuit may also include a digital filter (50) between the digital accumulator (48) and the digital variable frequency oscillator (52) to generate a magnitude signal (DRC) of magnitude proportional to the accumulated count for delivery to the variable frequency oscillator (52) to control the frequency thereof.

Abstract: A method and circuit (16) for driving a polyphase dc motor (14) of the type used in a mass data storage device (10) includes a commutator (55) for commutating drive voltages among windings (44-46) of the dc motor (14). In each commutation cycle, drive voltages are applied to two windings and a current summed from currents induced by the drive voltages is sunk from a third winding. A circuit (76) is provided for pulse width modulating the drive voltages during successive phase commutation cycles in respective pulse width modulated (PWM) cycles, and a circuit (66) is provided for measuring an amount of energy delivered to the motor from a beginning of each PWM cycle. A circuit (78-80, 70-72) terminates the drive voltages in a PWM cycle when the circuit (66) for measuring measures a predetermined amount of energy that has been delivered to the motor during the PWM cycle.

Abstract: A method and circuit for operating a polyphase dc motor in which discontinuous sinusoidal drive voltages are applied to the windings of the motor in predetermined phases. The discontinuous portion of the sinusoid is timed with the bemf zero crossings. Bemf zero crossings are detected, and phases of the drive voltages are adjusted to have zero crossings substantially in the discontinuities of the drive voltages. The method and circuit result in motor operation with significantly reduced acoustic motor noise.

Abstract: A method and circuit are presented for operating a polyphase dc motor in which substantially sinusoidal drive voltages are applied to the windings of the motor in predetermined phases. Zero crossings of currents flowing in respective windings of the motor are detected, and phases of the drive voltages are adjusted to have zero crossings substantially simultaneously with the detected zero crossings of the currents flowing in respective windings of the motor. The method and circuit results in motor operation with significantly reduced acoustic motor noise.

Abstract: A circuit to provide adaptive commutation delay for multi-pole brushless DC motors. The circuit adjusts the commutation delay as a function of the rotational speed of the motor to maximize motor torque and minimize power consumption. Unlike the prior art, the circuit avoids the need for complex circuitry or external components. The circuit may be implemented entirely within a single integrated circuit. The circuit includes a back-EMF sensing input, an oscillator, a voltage holding and proportioning circuit, one or more comparators and, optionally, an external control circuit. The back-EMF sensing input controls the operation of the oscillator. The voltage holding and proportioning circuit processes the oscillator output and provides outputs which are compared by the comparators. The comparators produce commutation delay signals and, optionally, other signals.