Patents by Inventor Bertrand Szelag
Bertrand Szelag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240069282Abstract: A process for fabricating an optoelectronic device having a germanium-on-silicon photodiode coupled to an Si3N4 waveguide includes producing a semiconductor substrate having a semiconductor stack of thin layers configured to form segments of a semiconductor structure of the photodiode, producing a photonic substrate having the Si3N4 waveguide, and transferring and bonding the semiconductor substrate to the photonic substrate. The photodiode is produced by photolithography and etching of the semiconductor stack to form the semiconductor structure which is then located above the waveguide.Type: ApplicationFiled: July 26, 2023Publication date: February 29, 2024Applicant: Commissariat à l'Energie Atomique et aux Energies AlternativesInventor: Bertrand SZELAG
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Patent number: 11862928Abstract: A laser source includes a semiconductor pad containing an active waveguide arranged on a functionalized substrate having an integrated waveguide. The integrated waveguide is formed from a stack of a first portion and of a second portion. A Bragg grating is arranged in the first portion and is covered by the second portion.Type: GrantFiled: July 27, 2020Date of Patent: January 2, 2024Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Karim Hassan, Laetitia Adelmini, Bertrand Szelag
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Publication number: 20230393338Abstract: This method comprises: before bonding a substrate to a layer of encapsulated semiconductor material in which a first part of an optical component is produced, producing indented pads inside a buried layer of silicon oxide, with each of these pads comprising an embedded face that extends parallel to an interface between the buried layer and the layer of encapsulated semiconductor material to a predetermined depth inside the buried layer, with each of the embedded faces being made of a material different from silicon oxide; then thinning the buried layer in order to leave a residual silicon oxide layer on the layer of encapsulated semiconductor material, with this thinning comprising an operation involving thinning the buried layer, with this thinning stopping as soon as the embedded face of the pads is exposed.Type: ApplicationFiled: June 1, 2023Publication date: December 7, 2023Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Karim HASSAN, Bertrand SZELAG
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Publication number: 20230194789Abstract: The fabrication of a first waveguide made of stoichiometric silicon nitride, of a second waveguide made of crystalline semiconductor material and of at least one active component optically coupled to the first waveguide via the second waveguide. The method includes: a) the formation of an aperture which passes through an encapsulation layer of the first waveguide and emerges in or on a substrate made of monocrystalline silicon, then b) the deposition by epitaxial growth of a crystalline seeding material inside the aperture until this crystalline seeding material forms a crystalline seed on a top face of the encapsulation layer, then c) a lateral epitaxy, of a crystalline semiconductor material from the crystalline seed formed to form a layer made of crystalline semiconductor material wherein the second waveguide is then produced.Type: ApplicationFiled: December 5, 2022Publication date: June 22, 2023Applicant: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Leopold VIROT, Jean-Michel HARTMANN, Karim HASSAN, Bertrand SZELAG, Quentin WILMART
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Publication number: 20230105346Abstract: A photonic chip including an optical coupler capable of transferring an optical signal between a first waveguide made of III-V material and a second waveguide made of silicon, this optical coupler including a first extension made of III-V material which extends the core of the first waveguide, a second extension made of silicon which extends the core of the second waveguide, and a SiGe inclusion buried inside of the second extension, this inclusion being made of SiGe whose chemical formula is Si1-xGex, where x is in the range between 0.2and 0.5, and being optically coupled, on a first side, to the first waveguide and, on a second opposite side, to the second waveguide.Type: ApplicationFiled: September 26, 2022Publication date: April 6, 2023Applicant: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Joan RAMIREZ, David BITAULD, Karim HASSAN, Bertrand SZELAG
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Publication number: 20230086803Abstract: The invention relates to a process for fabricating an optoelectronic system (1) comprising an optical device (60) coupled to an integrated photonic circuit (20), comprising producing a lower waveguide (13.1) from the thin single-crystal-silicon layer (13) of a first SOI substrate (10), then joining a second SOI substrate (40) thereto and producing an intermediate waveguide (43.1) from the thin single-crystal-silicon layer (43) of the second SOI substrate (40).Type: ApplicationFiled: September 14, 2022Publication date: March 23, 2023Applicant: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Karim HASSAN, Quentin WILMART, Bertrand SZELAG
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Publication number: 20230083344Abstract: The invention relates to a process for fabricating a semiconductor diode (1) via transfer of a semiconductor stack (20) then local etching to form a semiconductor pad (30), the production of the semiconductor pad (30) comprising a plurality of sequences comprising a dry etch that leaves a residual segment (23.1; 22.1), formation of a hard-mask spacer (42.1; 43.1), then a wet etch of the residual segment (23.1; 22.1).Type: ApplicationFiled: September 13, 2022Publication date: March 16, 2023Applicant: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Bertrand SZELAG, Laetitia ADELMINI
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Patent number: 11515164Abstract: A photonic device manufacturing method, including a step of transfer, onto a same surface of a photonic circuit previously formed inside and on top of a first substrate, of at least a first die made up of a III-V semiconductor material and of at least a second die made up of silicon nitride, the method further including a step of forming of photonic components in said at least one first and at least one second dies.Type: GrantFiled: November 5, 2020Date of Patent: November 29, 2022Assignee: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Karim Hassan, Corrado Sciancalepore, Bertrand Szelag
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Patent number: 11474316Abstract: The invention relates to a device for coupling a flared laser source (10) and an output waveguide (3), comprising a coupler (20), a combiner (40), and a network of intermediate waveguides (30) located between the coupler and the combiner and comprising a correcting central section (Sc) in which an effective index associated with the guided modes is adjusted so that the optical paths of the intermediate waveguides (30) between the coupler (20) and the combiner (40) are identical to one another.Type: GrantFiled: June 24, 2021Date of Patent: October 18, 2022Assignee: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Sylvain Guerber, Daivid Fowler, Bertrand Szelag
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Patent number: 11320592Abstract: The invention relates to a process for fabricating a photonic chip including steps of transferring a die to an actual transfer region of the receiving substrate comprising a central region entirely covered by the die and a peripheral region having a free surface, a first waveguide lying solely in the central region, and a second waveguide lying in the peripheral region; depositing an etch mask on a segment of the die and around the actual transfer region; and dry etching a free segment of the die, the free surface of the peripheral region then being partially etched.Type: GrantFiled: October 23, 2020Date of Patent: May 3, 2022Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Sylvie Menezo, Bertrand Szelag
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Patent number: 11251326Abstract: The invention relates to a method of fabrication of a photonic chip 1 comprising an avalanche photodiode 20 of the SACM type optically coupled to an integrated waveguide 40, comprising a step for forming a first spacer 24 allowing a constant peripheral recessing drzc of the charge region 23 to be defined later on with respect to an edge of the multiplication portion 22, then a step for forming a second spacer 26 allowing a constant peripheral recessing drpa of the absorption portion 27 to be defined later on with respect to an edge of the charge region 23.Type: GrantFiled: March 27, 2020Date of Patent: February 15, 2022Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Bertrand Szelag, Laetitia Adelmini, Stephane Brision
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Publication number: 20210405315Abstract: The invention relates to a device for coupling a flared laser source (10) and an output waveguide (3), comprising a coupler (20), a combiner (40), and a network of intermediate waveguides (30) located between the coupler and the combiner and comprising a correcting central section (Sc) in which an effective index associated with the guided modes is adjusted so that the optical paths of the intermediate waveguides (30) between the coupler (20) and the combiner (40) are identical to one another.Type: ApplicationFiled: June 24, 2021Publication date: December 30, 2021Applicant: Commissariat à l'Energie Atomique et aux Energies AlternativesInventors: Sylvain GUERBER, Daivid FOWLER, Bertrand SZELAG
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Patent number: 11075501Abstract: A process for producing a component includes a structure made of III-V material(s) on the surface of a substrate, the structure comprising at least one upper contact level defined on the surface of a first III-V material and a lower contact level defined on the surface of a second III-V material, comprising: successive operations of encapsulation of the structure with at least one dielectric; making primary apertures in a dielectric for the two contacts; making secondary apertures in a dielectric for the two contacts; at least partial filling of the apertures with at least one metallic material so as to produce upper contact bottom metallization and at least one upper contact pad in contact with the metallization for each of said contacts. A component produced by the process is also provided. The component may be a laser diode.Type: GrantFiled: December 22, 2017Date of Patent: July 27, 2021Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Elodie Ghegin, Christophe Jany, Fabrice Nemouchi, Philippe Rodriguez, Bertrand Szelag
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Publication number: 20210134601Abstract: A photonic device manufacturing method, including a step of transfer, onto a same surface of a photonic circuit previously formed inside and on top of a first substrate, of at least a first die made up of a III-V semiconductor material and of at least a second die made up of silicon nitride, the method further including a step of forming of photonic components in said at least one first and at least one second dies.Type: ApplicationFiled: November 5, 2020Publication date: May 6, 2021Applicant: Commissariat à I'Énergie Atomique et aux Énergies AlternativesInventors: Karim Hassan, Corrado Sciancalepore, Bertrand Szelag
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Publication number: 20210124119Abstract: The invention relates to a process for fabricating a photonic chip (1) comprising steps of transferring a die to an actual transfer region Zre of the receiving substrate (20) comprising a central region Zc entirely covered by the die and a peripheral region Zp having a free surface (25), a first waveguide lying solely in the central region Zc, and a second waveguide lying in the peripheral region Zp; depositing an etch mask (31) on a segment of the die (10) and around the actual transfer region Zre; and dry etching a free segment of the die (10), the free surface (25) of the peripheral region Zp then being partially etched.Type: ApplicationFiled: October 23, 2020Publication date: April 29, 2021Applicant: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Sylvie MENEZO, Bertrand SZELAG
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Publication number: 20210036488Abstract: The invention relates to a laser source comprising a semiconductor pad 10 containing an active waveguide 12 arranged on a functionalized substrate 20 comprising an integrated waveguide 22. The integrated waveguide 22 is formed from a stack of a first portion 23 and of a second portion 24. A Bragg grating 2 is arranged in the first portion 23 and is covered by the second portion 24.Type: ApplicationFiled: July 27, 2020Publication date: February 4, 2021Applicant: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Karim HASSAN, Laetitia Adelmini, Bertrand Szelag
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Publication number: 20200313026Abstract: The invention relates to a method of fabrication of a photonic chip 1 comprising an avalanche photodiode 20 of the SACM type optically coupled to an integrated waveguide 40, comprising a step for forming a first spacer 24 allowing a constant peripheral recessing drzc of the charge region 23 to be defined later on with respect to an edge of the multiplication portion 22, then a step for forming a second spacer 26 allowing a constant peripheral recessing drpa of the absorption portion 27 to be defined later on with respect to an edge of the charge region 23.Type: ApplicationFiled: March 27, 2020Publication date: October 1, 2020Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Bertrand SZELAG, Laetitia ADELMINI, Stephane BRISION
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Publication number: 20200274321Abstract: A process for producing a component includes a structure made of III-V material(s) on the surface of a substrate, the structure comprising at least one upper contact level defined on the surface of a first III-V material and a lower contact level defined on the surface of a second III-V material, comprising: successive operations of encapsulation of the structure with at least one dielectric; making primary apertures in a dielectric for the two contacts; making secondary apertures in a dielectric for the two contacts; at least partial filling of the apertures with at least one metallic material so as to produce upper contact bottom metallization and at least one upper contact pad in contact with the metallization for each of said contacts. A component produced by the process is also provided. The component may be a laser diode.Type: ApplicationFiled: December 22, 2017Publication date: August 27, 2020Inventors: Elodie GHEGIN, Christophe JANY, Fabrice NEMOUCHI, Philippe RODRIGUEZ, Bertrand SZELAG
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Patent number: 10725324Abstract: A photonic transmitter is provided, including a laser source including a first waveguide made of silicon and a second waveguide made of III-V gain material, the waveguides being separated from each other by a first segment of a dielectric layer; and a phase modulator including a first electrode made of single-crystal silicon and a second electrode made of III-V crystalline material, separated from each other by a second segment of the dielectric layer, where a thickness of the dielectric layer is between 40 nm and 1 ?m, where a thickness of a dielectric material in an interior of the first segment is equal to the thickness of the dielectric layer, and where a thickness of the dielectric material in an interior of the second segment is between 5 nm and 35 nm, a rest being formed by a thickness of semiconductor material.Type: GrantFiled: July 22, 2019Date of Patent: July 28, 2020Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Karim Hassan, Yohan Desieres, Bertrand Szelag
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Publication number: 20200026105Abstract: A photonic transmitter is provided, including a laser source including a first waveguide made of silicon and a second waveguide made of III-V gain material, the waveguides being separated from each other by a first segment of a dielectric layer; and a phase modulator including a first electrode made of single-crystal silicon and a second electrode made of III-V crystalline material, separated from each other by a second segment of the dielectric layer, where a thickness of the dielectric layer is between 40 nm and 1 ?m, where a thickness of a dielectric material in an interior of the first segment is equal to the thickness of the dielectric layer, and where a thickness of the dielectric material in an interior of the second segment is between 5 nm and 35 nm, a rest being formed by a thickness of semiconductor material.Type: ApplicationFiled: July 22, 2019Publication date: January 23, 2020Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Karim HASSAN, Yohan DESIERES, Bertrand SZELAG