Patents by Inventor Bertrand TAVERNIER

Bertrand TAVERNIER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10417110
    Abstract: The present invention concerns a method for verifying traceability of first code instructions in a procedural programming language generated from second code instructions in a modelling language, characterized in that it comprises the implementation, by a piece of equipment (1), of steps of: (a) Syntactic analysis: o of the first instructions so as to generate an AST, and o of the second instructions so as to generate an MDT; (b) Semantic analysis: o Of the AST so as to identify patterns representative of basic functional blocks of the first instructions; o Of the MDT so as to identify characteristic properties of basic functional blocks of the second instructions; (c) Matching, pairwise, the identified basic functional blocks, and confirming the traceability of first code instructions only if: o for each block of the first instructions, there is a functionally equivalent block in the second instructions, and o for each block of the second instructions, there is a functionally equivalent block in the first in
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: September 17, 2019
    Assignee: SAFRAN ELECTRONICS & DEFENSE
    Inventors: Severine Morin, Bertrand Corruble, Bertrand Tavernier, Frederic Titeux, Guy Renault
  • Patent number: 10394688
    Abstract: The present invention relates to a computer module testability problem detection method defined: on the one hand, by first code instructions in a modeling language representing blocks, divided up into one or more components, and relationships between the blocks and/or the components, and on the other hand, by second code instructions in a textual language representing a list of specifications that are each associated with a capability and define at least one information flow at the capability.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: August 27, 2019
    Assignee: SAFRAN ELECTRONICS & DEFENSE
    Inventors: Severine Morin, Bertrand Tavernier, Fabrice Coroller, Stephane Bigonneau
  • Publication number: 20190004928
    Abstract: The present invention relates to a computer module testability problem detection method defined: on the one hand, by first code instructions in a modeling language representing blocks, divided up into one or more components, and relationships between the blocks and/or the components, and on the other hand, by second code instructions in a textual language representing a list of specifications that are each associated with a capability and define at least one information flow at the capability.
    Type: Application
    Filed: December 21, 2016
    Publication date: January 3, 2019
    Inventors: Severine MORIN, Bertrand TAVERNIER, Fabrice COROLLER, Stephane BIGONNEAU
  • Publication number: 20170242775
    Abstract: The present invention concerns a method for verifying traceability of first code instructions in a procedural programming language generated from second code instructions in a modelling language, characterised in that it comprises the implementation, by a piece of equipment (1), of steps of: (a) Syntactic analysis: o of the first instructions so as to generate an AST, and o of the second instructions so as to generate an MDT; (b) Semantic analysis: o Of the AST so as to identify patterns representative of basic functional blocks of the first instructions; o Of the MDT so as to identify characteristic properties of basic functional blocks of the second instructions; (c) Matching, pairwise, the identified basic functional blocks, and confirming the traceability of first code instructions only if: o for each block of the first instructions, there is a functionally equivalent block in the second instructions, and o for each block of the second instructions, there is a functionally equivalent block in the first in
    Type: Application
    Filed: August 3, 2015
    Publication date: August 24, 2017
    Inventors: Severine MORIN, Bertrand CORRUBLE, Bertrand TAVERNIER, Frederic TITEUX, Guy RENAULT