Patents by Inventor Beth A. Peterson

Beth A. Peterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11912860
    Abstract: The disclosure provides high viscosity, organic resin systems incorporating inorganic materials. The resin systems incorporate glasses, glass ceramics, or ceramics in high load levels and are particularly useful for development of three dimensional articles and in additive manufacturing processes. Processes for making the resin systems are also provided.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 27, 2024
    Assignee: CORNING INCORPORATED
    Inventors: Laura Beth Cook, Laura Jeanne Cunneen, Richard Curwood Peterson, Kathleen Ann Wexell
  • Patent number: 11704209
    Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: July 18, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson
  • Patent number: 11663144
    Abstract: A method for improving cache hit ratios for selected storage elements within a storage system includes storing, in a cache of a storage system, non-favored storage elements and favored storage elements. The favored storage elements are retained in the cache longer than the non-favored storage elements. The method maintains a first LRU list containing entries associated with non-favored storage elements and designating an order in which the non-favored storage elements are evicted from the cache, and a second LRU list containing entries associated with favored storage elements and designating an order in which the favored storage elements are evicted from the cache. The method periodically scans the first LRU list for non-favored storage elements that have changed to favored storage elements, and the second LRU list for favored storage elements that have changed to non-favored storage elements. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: May 30, 2023
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Matthew G. Borlick, Beth A. Peterson
  • Patent number: 11620226
    Abstract: A method to prevent starvation of non-favored volumes in cache is disclosed. In one embodiment, such a method includes storing, in a cache of a storage system, non-favored storage elements and favored storage elements. A cache demotion algorithm is used to retain the favored storage elements in the cache longer than the non-favored storage elements. The method designates a maximum amount of storage space that the favored storage elements are permitted to consume in the cache. In preparation to free storage space in the cache, the method determines whether an amount of storage space consumed by the favored storage elements in the cache has reached the maximum amount. If so, the method frees storage space in the cache by demoting favored storage elements. If not, the method frees storage space in the cache in accordance with the cache demotion algorithm. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: February 9, 2020
    Date of Patent: April 4, 2023
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Matthew G. Borlick, Beth A. Peterson
  • Patent number: 11379382
    Abstract: A method for demoting a selected storage element from a cache memory includes storing favored and non-favored storage elements within a higher performance portion and lower performance portion of the cache memory. The favored storage elements are retained in the cache memory longer than the non-favored storage elements. The method maintains a first favored LRU list and a first non-favored LRU list, associated with the favored and non-favored storage elements stored within the higher performance portion of the cache. The method selects a favored or non-favored storage element to be demoted from the higher performance portion of the cache memory according to life expectancy and residency of the oldest favored and non-favored storage elements in the first LRU lists. The method demotes the selected from the higher performance portion of the cache to the lower performance portion of the cache, or to the data storage devices, according to a cache demotion policy.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: July 5, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Beth A. Peterson, Matthew G. Borlick
  • Patent number: 11372778
    Abstract: A method for demoting a selected storage element from a cache memory includes storing favored and non-favored storage elements within a higher performance portion and lower performance portion of the cache memory. The method maintains a plurality of favored LRU lists and a non-favored LRU list for the higher and lower performance portions of the cache memory. Each favored LRU list contains entries associated with the favored storage elements that have the same unique residency multiplier. The non-favored LRU list includes entries associated with the non-favored storage elements. The method demotes a selected favored or non-favored storage element from the higher and lower performance portions of the cache memory according to a cache demotion policy that provides a preference to favored storage elements over non-favored storage elements based on a computed cache life expectancy, residency time, and the unique residency multiplier.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: June 28, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Beth A. Peterson, Matthew G. Borlick
  • Patent number: 11372710
    Abstract: A computer-implemented method for preemptively migrating a failing extent includes receiving information of one or more failure conditions associated with an extent stored in a first storage portion of a first storage tier; predicting a failure of the extent based on the information; and selecting a second storage portion located in one of a plurality of storage tiers. The method also includes migrating the extent to the selected second storage portion. The selected second storage portion to which the extent is migrated is located in a lower storage tier. The lower storage tier includes less expensive and/or slower-to-access storage media than the first storage tier.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: June 28, 2022
    Assignee: International Business Machines Corporation
    Inventors: Juan A. Coronado, Lisa R. Martinez, Beth A. Peterson, Jennifer S. Shioya
  • Publication number: 20220179802
    Abstract: A method for demoting a selected storage element from a cache memory includes storing favored and non-favored storage elements within a higher performance portion and lower performance portion of the cache memory. The method maintains a plurality of favored LRU lists and a non-favored LRU list for the higher and lower performance portions of the cache memory. Each favored LRU list contains entries associated with the favored storage elements that have the same unique residency multiplier. The non-favored LRU list includes entries associated with the non-favored storage elements. The method demotes a selected favored or non-favored storage element from the higher and lower performance portions of the cache memory according to a cache demotion policy that provides a preference to favored storage elements over non-favored storage elements based on a computed cache life expectancy, residency time, and the unique residency multiplier.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Beth A. Peterson, Matthew G. Borlick
  • Publication number: 20220179801
    Abstract: A method for demoting a selected storage element from a cache memory includes storing favored and non-favored storage elements within a higher performance portion and lower performance portion of the cache memory. The favored storage elements are retained in the cache memory longer than the non-favored storage elements. The method maintains a first favored LRU list and a first non-favored LRU list, associated with the favored and non-favored storage elements stored within the higher performance portion of the cache. The method selects a favored or non-favored storage element to be demoted from the higher performance portion of the cache memory according to life expectancy and residency of the oldest favored and non-favored storage elements in the first LRU lists. The method demotes the selected from the higher performance portion of the cache to the lower performance portion of the cache, or to the data storage devices, according to a cache demotion policy.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Beth A. Peterson, Matthew G. Borlick
  • Patent number: 11341407
    Abstract: Provided are techniques for selecting a disconnect by training a machine learning module. A machine learning module is provided that receives inputs and produces an output. The output produced from the machine learning module based on the inputs for the first I/O operation and an estimated amount of time to acquire resources for a first I/O operation is determined. An actual amount of time to acquire resources for the first I/O operation is determined. The machine learning module is retrained based on the inputs, the output, and the actual amount of time it took to acquire resources for the first I/O operation versus an estimated amount of time to acquire the resources for the first I/O operation. The retrained machine learning module is used to select one of disconnect from a channel, the logical disconnect from the channel, or the physical disconnect from the channel for a second I/O operation.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: May 24, 2022
    Assignee: International Business Machines Corporation
    Inventors: Beth A. Peterson, Lokesh M. Gupta, Matthew R. Craig, Kevin J. Ash
  • Publication number: 20220156166
    Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
    Type: Application
    Filed: February 2, 2022
    Publication date: May 19, 2022
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson
  • Patent number: 11315226
    Abstract: A method is disclosed to ensure that components in a complex system are correctly connected together. In one embodiment, such a method captures a visual image of a system made up of multiple components connected together with cables. The method analyzes the visual image to determine connections between the components. The method further builds a current model that represents the connections between the components. This current model is then compared to a previous model to find differences between the current model and the previous model. If differences exist, the method notifies a user of the differences. This may assist the user in identifying any incorrect connections between the components. A corresponding apparatus and computer program product are also disclosed.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: April 26, 2022
    Assignee: International Business Machines Corporation
    Inventors: Paulina Acevedo, Veronica A. Reeves-Voeltner, Samantha A. Utter, Beth A. Peterson
  • Patent number: 11263097
    Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: March 1, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kyler A. Anderson, Kevin J. Ash, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson
  • Patent number: 11237730
    Abstract: A method for improving cache hit ratios for selected volumes within a storage system is disclosed. In one embodiment, such a method includes monitoring I/O to multiple volumes residing on a storage system. The storage system includes a cache to store data associated with the volumes. The method determines, from the I/O, which particular volumes of the multiple volumes would benefit the most if provided favored status in the cache. The favored status provides increased residency time in the cache to the particular volumes compared to volumes not having the favored status. The method generates a list of the particular volumes and transmits the list to the storage system. The storage system, in turn, provides increased residency time to the particular volumes in accordance with their favored status. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: May 12, 2019
    Date of Patent: February 1, 2022
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Beth A. Peterson, Kevin J. Ash, Kyler A. Anderson
  • Patent number: 11231998
    Abstract: Provided are a computer program product, system, and method for generating a chain of a plurality of write requests including a commit wait flag and plurality of write requests. The commit wait flag is set to one of an indicated first value or a second value. The commit wait flag is set to the first value to cause a storage server to process the write requests by requiring a current write request being processed to complete before transferring data for a next write request following the current write request. The commit wait flag is set to the second value to cause the storage server to process the write requests by transferring data for the next write request before completing the current write request preceding the next write request. The write request chain is sent to the storage server to apply the write requests to the storage.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: January 25, 2022
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey A. Berger, Susan K. Candelaria, Matthew J. Kalos, Beth A. Peterson, Harry M. Yudenfriend
  • Patent number: 11194730
    Abstract: A method for depopulating data from cache includes receiving a command to depopulate the cache of selected data. The command has an application identifier as a parameter. The application identifier is associated with an application that previously accessed the data. The method searches the cache for data elements that are marked with the application identifier and removes the data elements from the cache. In certain embodiments, the data elements are marked with a first application identifier associated with an application that staged the data elements into the cache, and a second application identifier associated with an application that last accessed the data elements. In certain embodiments, removing the data elements from the cache comprises only removing the data elements from the cache if the application identifier matches one or more of the first application identifier and the second application identifier. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: February 9, 2020
    Date of Patent: December 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Matthew G. Borlick, Kyler A. Anderson, Beth A. Peterson
  • Patent number: 11188430
    Abstract: Provided are a computer program product, system, and method for managing read and write requests from a host to tracks in storage cached in a cache. A determination is made whether track format table support information for a track indicates that a track format table was previously determined to have or not have the track format code for track format metadata. Track format metadata for the track is rebuilt to determine whether the track format table includes a track format code for the rebuilt track format metadata when the track format table support information indicates that the track format table was previously determined to have a track format code for the track. The track format metadata is not rebuilt when the track format table support information indicates that the track format table was previously determined to not have a track format code for the track.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: November 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kyler A. Anderson, Kevin J. Ash, Susan K. Candelaria, Lokesh M. Gupta, Beth A. Peterson
  • Patent number: 11176052
    Abstract: A method for improving cache hit ratios for selected volumes within a storage system is disclosed. In one embodiment, such a method includes storing, in a cache of a storage system, non-favored storage elements and favored storage elements. The favored storage elements are retained in the cache longer than the non-favored storage elements. The method maintains a “non-favored” LRU list that contains entries associated with non-favored storage elements and designates an order in which the non-favored storage elements are evicted from the cache. The method also maintains one or more “favored” LRU lists that contain entries associated with favored storage elements and designate an order in which the favored storage elements are evicted from the cache. Each “favored” LRU list is associated with favored storage elements that have a different preferred residency time in the cache. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: May 12, 2019
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Kevin J. Ash, Beth A. Peterson, Kyler A. Anderson
  • Patent number: 11169919
    Abstract: A method for improving cache hit ratios for selected volumes within a storage system includes monitoring I/O to multiple volumes residing on a storage system. The method determines, from the I/O, which particular volumes of the multiple volumes would benefit the most if provided favored status in cache of the storage system, where the favored status provides increased residency time in the cache compared to volumes not having the favored status. The method determines, from the I/O, an amount by which the increased residency time should exceed a residency time of volumes not having the favored status. The method generates an indicator that is representative of the amount and transmits this indicator to the storage system. The storage system, in turn, provides increased residency time to the particular volumes in accordance with the favored status and indicator. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: May 12, 2019
    Date of Patent: November 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Beth A. Peterson, Kyler A. Anderson, Kevin J. Ash
  • Patent number: 11163698
    Abstract: A method for improving cache hit ratios for selected volumes when using synchronous I/O is disclosed. In one embodiment, such a method includes establishing, in cache, a first set of non-favored storage elements from non-favored storage areas. The method further establishes, in the cache, a second set of favored storage elements from favored storage areas. The method calculates a life expectancy for the non-favored storage elements to reside in the cache prior to eviction. The method further executes an eviction policy for the cache wherein the favored storage elements are maintained in the cache for longer than the life expectancy of the non-favored storage elements. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: May 12, 2019
    Date of Patent: November 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh M. Gupta, Beth A. Peterson, Kevin J. Ash, Kyler A. Anderson