Patents by Inventor Bettina Rebaud

Bettina Rebaud has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8621257
    Abstract: A device for powering an electronic circuit that applies at least a first voltage or a second voltage, different from the first voltage, to the electronic circuit. The device includes a performance monitor that receives an item of information defining a constraint and determines a first duration and a second duration, such that the operation of the electronic circuit at a first frequency associated with the first voltage for the first duration, and at a second frequency associated with the second voltage for the second duration, complies with the constraint. The device applies the first voltage and the first frequency to the circuit for the first duration and the second voltage and the second frequency for the second duration.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: December 31, 2013
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Sylvain Miermont, Edith Beigne, Bettina Rebaud, Pascal Vivet
  • Patent number: 8390312
    Abstract: A digital electronic circuit includes: a plurality of sequential elements; at least one data-conducting path connecting an input sequential element to a destination sequential element; a clock outputting a clock signal on a clock tree for setting the speed of the sequential elements; a monitoring device receiving, as an input, at least one data signal traveling on a conducting path and arriving at a destination sequential element, the monitoring device including: a module for defining at least one detection window according to the clock tree; and a detector for detecting a transition of each data signal received during a detection window; and wherein each detection window is defined so as to enable the detection or anticipation of a fault corresponding to a violation of the rise time or the maintenance time of a data signal relative to a clock signal edge received by the destination sequential element receiving the data signal.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: March 5, 2013
    Assignee: Commissariat à l'énergie atomique et aux energies alternatives
    Inventors: Bettina Rebaud, Marc Belleville, Philippe Lionel Maurine
  • Publication number: 20120074982
    Abstract: A digital electronic circuit includes: a plurality of sequential elements; at least one data-conducting path connecting an input sequential element to a destination sequential element; a clock outputting a clock signal on a clock tree for setting the speed of the sequential elements; a monitoring device receiving, as an input, at least one data signal traveling on a conducting path and arriving at a destination sequential element, the monitoring device including: a module for defining at least one detection window according to the clock tree; and a detector for detecting a transition of each data signal received during a detection window; and wherein each detection window is defined so as to enable the detection or anticipation of a fault corresponding to a violation of the rise time or the maintenance time of a data signal relative to a clock signal edge received by the destination sequential element receiving the data signal.
    Type: Application
    Filed: April 20, 2010
    Publication date: March 29, 2012
    Applicant: Commissariat à l'énergie atomique et aux energies
    Inventors: Bettina Rebaud, Marc Belleville, Philippe Lionel Maurine
  • Publication number: 20110029795
    Abstract: A device for powering an electronic circuit that applies at least a first voltage or a second voltage, different from the first voltage, to the electronic circuit. The device includes a performance monitor that receives an item of information defining a constraint and determines a first duration and a second duration, such that the operation of the electronic circuit at a first frequency associated with the first voltage for the first duration, and at a second frequency associated with the second voltage for the second duration, complies with the constraint. The device applies the first voltage and the first frequency to the circuit for the first duration and the second voltage and the second frequency for the second duration.
    Type: Application
    Filed: March 6, 2009
    Publication date: February 3, 2011
    Inventors: Sylvain Miermont, Edith Beigne, Bettina Rebaud, Pascal Vivet