Abstract: Disclosed is a combinational logic arrangement for use in a data processor that selectively performs a plurality of bit manipulations or logic operations including shift, rotate, and insert under mask. The arrangement is controlled by a single instruction format which specifies the parameters needed for each of the operations. The logic arrangement interprets a data word as a bit string with two boundary lines that divide the string into three regions: left region, quantum region and right region. The logic circuit operates upon the left and/or right regions of an output word to either clear all bits, set all bits, propagate the sign bit of an input word or retain the information in the left and right regions of an input data word. The circuit then inserts a quantum of bits obtained from a specified region of another input data word into the output data word starting at any desired location.