Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.

Abstract: Embodiments herein may relate to a patch on interposer (PoINT) architecture. In embodiments, the PoINT architecture may include a plurality of solder joints between a patch and an interposer. The solder joints may include a relatively high temperature solder ball and a relatively low temperature solder paste that at least partially surrounds the solder ball. Other embodiments may be described and/or claimed.

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.

Abstract: Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include modifying an underfill material with one of a thiol adhesion promoter, an azole coupling agent, surface modified filler, and peroxide based cross-linking polymer chemistries to greatly enhance adhesion in package structures utilizing the embodiments herein.

Abstract: A silicon wafer has a plurality of integrated circuits terminated on a surface of the silicon wafer. The silicon wafer has a soluble protective coat on the surface of the silicon wafer. The coated silicon wafer may be processed by laser scribing. A solvent wash may be used to remove the soluble protective coat and debris from laser scribing. The coated silicon wafer may be saw cut after laser scribing. A flow of solvent may be provided during the saw cutting. The flow of solvent may be sufficient to remove at least a substantial portion of the soluble protective coat.