Abstract: A power converter with a bootstrapped switch is disclosed. A power converter is configured to generate a regulated supply voltage and includes an inductor coupled between a ground node and a switching node. The power converter further includes a switch (e.g., a low-side switch) coupled between the switching node and a supply voltage node, wherein the power converter is configured to generate the supply voltage on the voltage node, and a capacitor, wherein a voltage rating of the capacitor is less than a magnitude of the voltage. The power converter also includes a control circuit configured to, during a first phase, cause the capacitor to accumulate a charge, and during a second phase, cause activation of the switch by causing the capacitor to transfer a portion of the charge to a parasitic capacitance of the switch.

Abstract: The present disclosure describes a system with a first counter circuit, a first converter circuit, a second counter circuit, and a second converter circuit. The first counter circuit is configured to output a first count value based on a comparison between a first reference value and a switched node value of a voltage regulator. The first converter circuit is configured to adjust an activation time of the voltage regulator based on the first count value. The second counter circuit is configured to output a second count value based on a comparison between a second reference value and the switched node value of the voltage regulator. The second converter circuit is configured to adjust an amount of current drawn away from an output of the voltage regulator based on the second count value.

Abstract: A switching circuit for a single-input multiple-output power converter is disclosed. The switching circuit includes an inductor coupled between an input power supply and a switch node, which is further coupled to a shared capacitor. Multiple switch circuits generate, during different time periods, corresponding boost voltages using the shared capacitor. The boost voltages are used by the multiple switch circuits to couple the switch node to corresponding regulated power supply nodes.

Abstract: The present disclosure describes a system with a first counter circuit, a first converter circuit, a second counter circuit, and a second converter circuit. The first counter circuit is configured to output a first count value based on a comparison between a first reference value and a switched node value of a voltage regulator. The first converter circuit is configured to adjust an activation time of the voltage regulator based on the first count value. The second counter circuit is configured to output a second count value based on a comparison between a second reference value and the switched node value of the voltage regulator. The second converter circuit is configured to adjust an amount of current drawn away from an output of the voltage regulator based on the second count value.

Abstract: A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.

Abstract: A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.