Patents by Inventor BHANUSHANKAR DONI GURUDATH

BHANUSHANKAR DONI GURUDATH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Storage system and folding method for enhanced performance
    Patent number: 11960758
    Abstract: Rather than use one long folding operation to fold data from single-level cell (SLC) blocks into a multi-level cell (MLC) block, a storage system uses a multi-stage folding operation. By breaking up the folding process into stages, SLC blocks involved in an earlier stage can be released prior to a subsequent stage being performed. This can increase performance of the storage system by releasing SLC source blocks sooner and reducing an SLC block budget requirement.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: April 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Bhanushankar Doni Gurudath, Harish Gajula
  • Storage System and Folding Method for Enhanced Performance
    Publication number: 20230325105
    Abstract: Rather than use one long folding operation to fold data from single-level cell (SLC) blocks into a multi-level cell (MLC) block, a storage system uses a multi-stage folding operation. By breaking up the folding process into stages, SLC blocks involved in an earlier stage can be released prior to a subsequent stage being performed. This can increase performance of the storage system by releasing SLC source blocks sooner and reducing an SLC block budget requirement.
    Type: Application
    Filed: April 6, 2022
    Publication date: October 12, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Bhanushankar Doni Gurudath, Harish Gajula
  • Buffering storage device data in a host memory buffer
    Patent number: 10635580
    Abstract: Apparatus, systems, methods, and computer program products for buffering storage device data in a host memory buffer (HMB) are presented. A non-volatile memory and a controller are in communication with a non-volatile memory. A controller is configured to receive an input/output (I/O) operation including data. A controller is configured to transmit at least a portion of data to an HMB of a host device separate from a non-volatile memory and a controller for storage until a trigger event occurs.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: April 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kalpit Bordia, Raghavendra Gopalakrishnan, Sachin Krishna Kudva, Ashim Ranjan Saikia, Bhanushankar Doni Gurudath, Ramanathan Muthiah, Pradeep Sreedhar, Prashanth Reddy Enukonda, Ramkumar Ramamurthy
  • BUFFERING STORAGE DEVICE DATA IN A HOST MEMORY BUFFER
    Publication number: 20200012595
    Abstract: Apparatus, systems, methods, and computer program products for buffering storage device data in a host memory buffer (HMB) are presented. A non-volatile memory and a controller are in communication with a non-volatile memory. A controller is configured to receive an input/output (I/O) operation including data. A controller is configured to transmit at least a portion of data to an HMB of a host device separate from a non-volatile memory and a controller for storage until a trigger event occurs.
    Type: Application
    Filed: July 9, 2018
    Publication date: January 9, 2020
    Applicant: Western Digital Technologies, Inc.
    Inventors: KALPIT BORDIA, RAGHAVENDRA GOPALAKRISHNAN, SACHIN KRISHNA KUDVA, ASHIM RANJAN SAIKIA, BHANUSHANKAR DONI GURUDATH, RAMANATHAN MUTHIAH, PRADEEP SREEDHAR, PRASHANTH REDDY ENUKONDA, RAMKUMAR RAMAMURTHY