Patents by Inventor Bharath Mandyam

Bharath Mandyam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200173816
    Abstract: An encoder device includes an array of detectors that are operable to detect a flux and to generate currents in response to the detection; multiple current lines for conducting currents; a set of switches coupled between the array of detectors and the multiple current lines such that an output of each of the array of detectors is routed to none or one of the multiple current lines; and a controller operable to configure the set of switches.
    Type: Application
    Filed: February 3, 2020
    Publication date: June 4, 2020
    Inventors: James Cusey, Stepan Iliasevitch, Benjamin Mak, Bharath Mandyam, Brent Hans Larson
  • Patent number: 10551223
    Abstract: An encoder system includes a configurable detector array, wherein the configurable detector array includes a plurality of detectors. In an embodiment, the encoder system includes an application-specific integrated circuit (ASIC). The encoder system may also include a memory operable to store a partition map that defines a state for each of the plurality of detectors. In an embodiment, the memory includes a non-volatile memory. The encoder system may also include a controller, such as a microcontroller, operable to read from the memory the partition map and to configure the configurable detector array according to the configuration map. The encoder system may also include an emitter operable to generate a flux modulated by a motion object, wherein the configurable detector array is operable to receive the flux and generate respective current outputs for each of the detectors in response to the flux.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: February 4, 2020
    Assignee: TT ELECTRONICS PLC
    Inventors: James Cusey, Stepan Illasevitch, Benjamin Mak, Bharath Mandyam, Brent Hans Larson
  • Patent number: 10401942
    Abstract: A reference voltage sub-system that allows fast power up after spending extended periods in an ultra-low power standby mode. The reference voltage sub-system includes a reference voltage buffer, a reference voltage keeper, an active calibration facility for selectively adjusting the reference voltage keeper output to match the reference voltage buffer output, and a selection means for selecting between the reference voltage buffer output and the reference voltage keeper output.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: September 3, 2019
    Assignee: Ambiq Micro Inc.
    Inventors: Ivan Bogue, Yanning Lu, Bharath Mandyam
  • Publication number: 20180266852
    Abstract: An encoder system includes a configurable detector array, wherein the configurable detector array includes a plurality of detectors. In an embodiment, the encoder system includes an application-specific integrated circuit (ASIC). The encoder system may also include a memory operable to store a partition map that defines a state for each of the plurality of detectors. In an embodiment, the memory includes a non-volatile memory. The encoder system may also include a controller, such as a microcontroller, operable to read from the memory the partition map and to configure the configurable detector array according to the configuration map. The encoder system may also include an emitter operable to generate a flux modulated by a motion object, wherein the configurable detector array is operable to receive the flux and generate respective current outputs for each of the detectors in response to the flux.
    Type: Application
    Filed: August 18, 2017
    Publication date: September 20, 2018
    Inventors: James Cusey, Stepan Illasevitch, Benjamin Mak, Bharath Mandyam, Brent Hans Larson
  • Publication number: 20180239415
    Abstract: A reference voltage sub-system that allows fast power up after spending extended periods in an ultra-low power standby mode. The reference voltage sub-system includes a reference voltage buffer, a reference voltage keeper, an active calibration facility for selectively adjusting the reference voltage keeper output to match the reference voltage buffer output, and a selection means for selecting between the reference voltage buffer output and the reference voltage keeper output.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Applicant: Ambiq Micro, Inc.
    Inventors: Ivan Bogue, Yanning Lu, Bharath Mandyam
  • Patent number: 9261541
    Abstract: In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power sampling solution as well as simplifying any driver circuitry required by the sampler. The embodiments of the invention may be applied to sampling processes within analog-to-digital converters and may also be applicable to various other types of circuits in which a sampling input having input voltages that are lower than its negative supply voltage.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: February 16, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventors: David Maes, Bharath Mandyam
  • Publication number: 20110089978
    Abstract: In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power sampling solution as well as simplifying any driver circuitry required by the sampler. The embodiments of the invention may be applied to sampling processes within analog-to-digital converters and may also be applicable to various other types of circuits in which a sampling input having input voltages that are lower than its negative supply voltage.
    Type: Application
    Filed: December 28, 2010
    Publication date: April 21, 2011
    Inventors: David Maes, Bharath Mandyam
  • Patent number: 7863943
    Abstract: In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power sampling solution as well as simplifying any driver circuitry required by the sampler. The embodiments of the invention may be applied to sampling processes within analog-to-digital converters and may also be applicable to various other types of circuits in which a sampling input having input voltages that are lower than its negative supply voltage.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: January 4, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: David Maes, Bharath Mandyam
  • Publication number: 20090085648
    Abstract: In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power sampling solution as well as simplifying any driver circuitry required by the sampler. The embodiments of the invention may be applied to sampling processes within analog-to-digital converters and may also be applicable to various other types of circuits in which a sampling input having input voltages that are lower than its negative supply voltage.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 2, 2009
    Inventors: David Maes, Bharath Mandyam
  • Patent number: 6995701
    Abstract: Multi-channel high resolution segmented resistor string digital-to-analog converters (DACs) suitable for realization in a single integrated circuit. The DACs incorporate a primary resistor string shared by all channels, and one or more additional pluralities of additional resistor strings for additional resolution. The primary resistor string may be buffered to limit the effect of loading thereon by the plurality of resistor strings coupled thereto. Current sources may also be coupled to the resistor strings coupled to the primary resistor string to also avoid loading of the primary resistor string. A trimmable resistor string of fewer bits may be connected to the primary resistor string for laser trimming. In the embodiment disclosed, a plurality of secondary and tertiary resistor strings are used, with leapfrogging minimizing the switches required.
    Type: Grant
    Filed: March 2, 2004
    Date of Patent: February 7, 2006
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Simon Bevan Churchill, Gaurang Arvind Shah, David Webb, Bharath Mandyam