Patents by Inventor Bhargav Pandya
Bhargav Pandya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11923448Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.Type: GrantFiled: January 10, 2022Date of Patent: March 5, 2024Assignee: Infineon Technologies Austria AGInventors: Hyeongnam Kim, Jens Ulrich Heinle, Mohamed Imam, Bhargav Pandya, Ramakrishna Tadikonda, Manuel Vorwerk
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Patent number: 11862630Abstract: A semiconductor device includes a main bi-directional switch formed on a semiconductor substrate and having first and second gates, a first source electrically connected to a first voltage terminal, a second source electrically connected to a second voltage terminal, and a common drain. The semiconductor device further includes a discharge circuit having a plurality of individual transistors or an auxiliary bi-directional switch monolithically integrated with the main bi-directional switch and connected in a common source configuration to the semiconductor substrate. The plurality of individual transistors or the auxiliary bi-directional switch includes a first drain connected to the first source of the main bi-directional switch, a second drain connected to the second source of the main bi-directional switch, and first and second gates each decoupled from gate drive circuitry so that the first and the second gates are controlled at least passively and based on a state of the main bi-directional switch.Type: GrantFiled: April 23, 2018Date of Patent: January 2, 2024Assignee: Infineon Technologies Austria AGInventors: Mohamed Imam, Hyeongnam Kim, Kennith Kin Leong, Bhargav Pandya, Gerhard Prechtl
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Publication number: 20230067452Abstract: A semiconductor device includes a barrier region and a channel region, source and drain electrodes, and a gate structure that is configured to control a conductive connection between the source and drain electrodes, wherein the barrier region comprises a first barrier layer and a second barrier layer, wherein in a central portion of the device the second barrier layer is the only layer that is disposed over the channel region, wherein in outer lateral portions of the device the first barrier layer is disposed over the channel region, wherein the first and second barrier layers are each III-V semiconductor alloys, and wherein a molar fraction of a second type III element in the central portion is higher than a molar fraction of the second type III element in the first barrier layer.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Inventors: Korbinian Reiser, Ingo Daumiller, Lauri Knuuttila, Bhargav Pandya
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Publication number: 20220130987Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.Type: ApplicationFiled: January 10, 2022Publication date: April 28, 2022Inventors: Hyeongnam Kim, Jens Ulrich Heinle, Mohamed Imam, Bhargav Pandya, Ramakrishna Tadikonda, Manuel Vorwerk
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Patent number: 11251294Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.Type: GrantFiled: March 24, 2020Date of Patent: February 15, 2022Assignee: Infineon Technologies Austria AGInventors: Hyeongnam Kim, Jens Ulrich Heinle, Mohamed Imam, Bhargav Pandya, Ramakrishna Tadikonda, Manuel Vorwerk
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Publication number: 20210305417Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.Type: ApplicationFiled: March 24, 2020Publication date: September 30, 2021Inventors: Hyeongnam Kim, Jens Ulrich Heinle, Mohamed Imam, Bhargav Pandya, Ramakrishna Tadikonda, Manuel Vorwerk
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Publication number: 20190326280Abstract: A semiconductor device includes a main bi-directional switch formed on a semiconductor substrate and having first and second gates, a first source electrically connected to a first voltage terminal, a second source electrically connected to a second voltage terminal, and a common drain. The semiconductor device further includes a discharge circuit having a plurality of individual transistors or an auxiliary bi-directional switch monolithically integrated with the main bi-directional switch and connected in a common source configuration to the semiconductor substrate. The plurality of individual transistors or the auxiliary bi-directional switch includes a first drain connected to the first source of the main bi-directional switch, a second drain connected to the second source of the main bi-directional switch, and first and second gates each decoupled from gate drive circuitry so that the first and the second gates are controlled at least passively and based on a state of the main bi-directional switch.Type: ApplicationFiled: April 23, 2018Publication date: October 24, 2019Inventors: Mohamed Imam, Hyeongnam Kim, Kennith Kin Leong, Bhargav Pandya, Gerhard Prechtl
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Publication number: 20070072840Abstract: The invention relates to processes for the preparation of polymorphic forms of salts of quetiapine. More particularly, it relates to the preparation of polymorphic forms of quetiapine hydrochloride designated as Form A, B, and C. The invention also relates to pharmaceutical compositions that include the Form A, Form B, and Form C and use of the compositions for treating schizophrenia, acute manic episodes associated with bipolar I disorder. The invention also relates to the preparation of an oxalate salt of quetiapine and maleate salt of quetiapine.Type: ApplicationFiled: May 30, 2006Publication date: March 29, 2007Inventors: Bhargav PANDYA, Ram Aryan
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Publication number: 20060211761Abstract: The invention relates to particular hydroxyl and protected hydroxyl derivatives of compounds known to be useful as HMG CoA-reductase inhibitors. In particular, herein are provided hydroxyl and protected hydroxyl compounds of Formula I and their corresponding lactones.Type: ApplicationFiled: July 8, 2003Publication date: September 21, 2006Inventors: Yatendra Kumar, Ram Aryan, Jitendra Sattigeri, Mohammad Salman, Gowri Shankar, Kumar Bhushan, Bhargav Pandya, Ramnik Sharma