Patents by Inventor Bhargava Yalala

Bhargava Yalala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8213558
    Abstract: The method and system of digital timing correction in a digital baseband communication system is disclosed. In one embodiment, a method includes receiving samples at a predetermined time interval based on a current clock signal of a receiver clock, reading in a prompt sample of the received samples and a successor sample of the received samples based on a control signal, interpolating a projected sample based on the prompt sample, the successor sample and a predetermined time offset, determining the time offset for interpolation, by accumulating sampling frequency offset between the receiver clock and a reference clock, relative to a sample timing of the prompt sample, resulting in an interpolated data sample rate reduced by an integer multiple factor compared to a received sample rate and receiving a next sample of the received samples based on the current clock signal of the receiver clock.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: July 3, 2012
    Assignee: Ittiam Systems (P) Ltd.
    Inventors: Amit Shaw, Bhargava Yalala
  • Publication number: 20090190702
    Abstract: The method and system of digital timing correction in a digital baseband communication system is disclosed. In one embodiment, a method includes receiving samples at a predetermined time interval based on a current clock signal of a receiver clock, reading in a prompt sample of the received samples and a successor sample of the received samples based on a control signal, interpolating a projected sample based on the prompt sample, the successor sample and a predetermined time offset, determining the time offset for interpolation, by accumulating sampling frequency offset between the receiver clock and a reference clock, relative to a sample timing of the prompt sample, resulting in an interpolated data sample rate reduced by an integer multiple factor compared to a received sample rate and receiving a next sample of the received samples based on the current clock signal of the receiver clock.
    Type: Application
    Filed: January 24, 2008
    Publication date: July 30, 2009
    Inventors: AMIT SHAW, Bhargava Yalala