Abstract: A storage device identifies a die with a defective temperature sensor and excludes the die temperature from thermal calculations. The storage device includes a memory device with multiple dies. Each die includes a temperature sensor. A controller on the storage device executes a defective temperature sensor scheme to obtain a temperature for a first die in the memory device. The controller compares the first die temperature against a benchmark. The controller determines that the first die includes a defective temperature sensor if there is a temperature variance in the first die temperature and the benchmark and if the temperature variance is greater than a die temperature variation threshold.

Abstract: Apparatuses, systems, methods, and computer program products for programming an unprogrammed upper page based on lower page programming are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a data component that is configured to receive a write request for a first page of a set of multi-level storage cells of a non-volatile storage device. A set of multi-level storage cells includes a first page and a second page. A controller includes a page component that is configured to determine that a write request does not comprise data for at least a portion of a second page of a set of multi-level storage cells. A controller includes a write component that is configured to program at least a portion of a second page of a set of multi-level storage cells with data of a first page of a set of multi-level storage cells.

Abstract: Apparatuses, systems, methods, and computer program products for programming an unprogrammed upper page based on lower page programming are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a data component that is configured to receive a write request for a first page of a set of multi-level storage cells of a non-volatile storage device. A set of multi-level storage cells includes a first page and a second page. A controller includes a page component that is configured to determine that a write request does not comprise data for at least a portion of a second page of a set of multi-level storage cells. A controller includes a write component that is configured to program at least a portion of a second page of a set of multi-level storage cells with data of a first page of a set of multi-level storage cells.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for stimulus generation for component-level verification. A method includes monitoring one or more internal signals for one or more components of a chip during a full-chip verification process. A method includes generating one or more stimuli for triggering one or more internal signals during verification of one or more components of a chip. Stimuli may be generated based in part on feedback from a full-chip verification process. A method includes verifying an operating state of one or more components of a chip in response to generated stimuli that trigger one or more internal signals during verification of the one or more components.