Abstract: Design errors generated employing a mask rule check (MRC) program are indexed and examined one by one by an automated computer program connected to a false error pattern database that contains previously known waivered patterns, a real error pattern database that contains previously known pairs of an error-containing pattern and a corresponding error-free pattern, and optionally a mask house rule database. A waiver is applied to each design error for which a matching pattern is found in the false error pattern database. Each design error for which a match is found in the real error pattern database is modified to substitute an error-free pattern for an error-containing pattern therein. The output of the automated program includes a list of design errors for which no solution is found by the automated program.

Abstract: Design errors generated employing a mask rule check (MRC) program are indexed and examined one by one by an automated computer program connected to a false error pattern database that contains previously known waivered patterns, a real error pattern database that contains previously known pairs of an error-containing pattern and a corresponding error-free pattern, and optionally a mask house rule database. A waiver is applied to each design error for which a matching pattern is found in the false error pattern database. Each design error for which a match is found in the real error pattern database is modified to substitute an error-free pattern for an error-containing pattern therein. The output of the automated program includes a list of design errors for which no solution is found by the automated program.

Abstract: A method for selecting a process for a new integrated circuit design. Structures that are used in existing integrated circuit designs are identified, as well as the photolithography processes that are used to fabricate integrated circuits that are based on the existing designs. A process window is determined for each structure/process combination by running tests on different combinations of process variables, and a database of the process windows is compiled. The structures that are to be used in the new integrated circuit design are identified, and the process windows associated with the identified structures for the new integrated circuit design are selected from the database. The selected process windows for the identified structures are overlaid, grouped by common process, thereby creating a resultant process window for each process. One of the processes is selected, based at least in part on comparative sizes of the resultant process windows.