Patents by Inventor Bhavesh G. Patel

Bhavesh G. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9785607
    Abstract: A receiver includes an analog-to-digital converter (ADC) module that receives a test signal via a transmission channel and provides a time domain representation of the test signal as received by the receiver, and a processor that determines a time domain representation of an impedance of the transmission channel based on the time domain representation of the test signal.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: October 10, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Bhavesh G. Patel, Bhyrav M. Mutnury
  • Patent number: 9674013
    Abstract: A receiver includes an analog-to-digital converter module configured to receive a test bit stream via a transmission channel and to provide a channel loss value of the transmission channel based on the test bit stream, a continuous time linear equalization module configured to receive a data bit stream via the transmission channel and to provide an equalized data bit stream based on an equalization setting, and a control module configured to set the equalization setting such that the CTLE module provides an equalization level to compensate for the channel loss value.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: June 6, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Bhavesh G. Patel, Bhyrav M. Mutnury
  • Publication number: 20160218888
    Abstract: A receiver includes an analog-to-digital converter module configured to receive a test bit stream via a transmission channel and to provide a channel loss value of the transmission channel based on the test bit stream, a continuous time linear equalization module configured to receive a data bit stream via the transmission channel and to provide an equalized data bit stream based on an equalization setting, and a control module configured to set the equalization setting such that the CTLE module provides an equalization level to compensate for the channel loss value.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 28, 2016
    Inventors: Bhavesh G. Patel, Bhyrav M. Mutnury
  • Publication number: 20160132459
    Abstract: A receiver includes an analog-to-digital converter (ADC) module that receives a test signal via a transmission channel and provides a time domain representation of the test signal as received by the receiver, and a processor that determines a time domain representation of an impedance of the transmission channel based on the time domain representation of the test signal.
    Type: Application
    Filed: November 10, 2014
    Publication date: May 12, 2016
    Inventors: Bhavesh G. Patel, Bhyrav M. Mutnury
  • Patent number: 9325536
    Abstract: A receiver includes an analog-to-digital converter module configured to receive a test bit stream via a transmission channel and to provide a channel loss value of the transmission channel based on the test bit stream, a continuous time linear equalization module configured to receive a data bit stream via the transmission channel and to provide an equalized data bit stream based on an equalization setting, and a control module configured to set the equalization setting such that the CTLE module provides an equalization level to compensate for the channel loss value.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: April 26, 2016
    Assignee: DELL PRODUCTS, LP
    Inventors: Bhavesh G. Patel, Bhyrav M. Mutnury
  • Publication number: 20160087816
    Abstract: A receiver includes an analog-to-digital converter module configured to receive a test bit stream via a transmission channel and to provide a channel loss value of the transmission channel based on the test bit stream, a continuous time linear equalization module configured to receive a data bit stream via the transmission channel and to provide an equalized data bit stream based on an equalization setting, and a control module configured to set the equalization setting such that the CTLE module provides an equalization level to compensate for the channel loss value.
    Type: Application
    Filed: September 19, 2014
    Publication date: March 24, 2016
    Inventors: Bhavesh G. Patel, Bhyrav M. Mutnury
  • Patent number: 6597919
    Abstract: A method and system for optimal radio channel management in a distributed connection and transport network. The method includes the steps of determining the quality of service required by a communication session, determining whether transport resources are available for immediate use by the communication session, and queuing the communication session for assignment to transport resources in accordance with the quality of service required and the availability of transport resources for immediate use.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: July 22, 2003
    Assignee: Motorola, Inc.
    Inventors: Surender Kumar, James Mathis, Bhavesh G. Patel, Gary J. Aitkenhead, Mark Shaughnessy
  • Patent number: 6141347
    Abstract: A wireless communication system 200 comprises a connectionless packet network 201 coupled to a plurality of sites 203-208 that are in wireless communication with a plurality of subscriber units 210-217 logically arranged into a plurality of talk groups having corresponding talk group identifications. In one embodiment, each site maintains mappings 220-225 of at least one multicast address to at least one talk group identification. In another embodiment, individual subscriber units maintain such mappings 320. When a subscriber unit affiliates with a given site and talk group (501, 601), the site identifies a multicast address corresponding to the talk group. Based on the multicast address, the site can participate in traffic targeted for the multicast address and, consequently, for the talk group. In this manner, mobility Processing is decentralized, system calability is improved and call setup delays are minimized.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: October 31, 2000
    Assignee: Motorola, Inc.
    Inventors: Mark Shaughnessy, James E. Mathis, Surender Kumar, Bhavesh G. Patel, Mario F. DeRango