Abstract: Systems and methods are provided for management of PCIe bandwidth within an IHS (Information Handling System). A PCIe connection is detected between a first of the processors of the IHS and a solid-state drive accessed via a DPU (Data Processing Unit). In a processor core of the DPU (e.g., ARM core) buffers are initialized for tracking specific types of errors in the PCIe connection. Upon detecting an error in the PCIe connection, the error is added to one of the designated buffers based on a type of the detected error. If adding of the error in the PCIe connection to the buffer results in a size limit of the buffer being reached, and if the size of the buffer cannot be reduced through retransmission of the errors in the buffer, a transmission speed of the PCIe connection is downgraded, thus extending operations at higher transmission speeds.

Abstract: A monopulse secondary surveillance radar is configured to integrate replies to active interrogations and passive squitter reception into a single surveillance system, and includes: a three-channel antenna arrangement; a redundant ADS-B antenna arrangement including a first and second omnidirectional ADS-B antenna, each having a low noise amplifier, and each being integrated with a GPS antenna; and a pair of redundant four-channel interrogators. The three-channel antenna arrangement is configured to transmit interrogations, and to receive corresponding replies from an aircraft transponder. The first ADS-B antenna is coupled to a first of the pair of redundant four-channel interrogators, and the second ADS-B antenna is coupled to a second of said pair of redundant four-channel interrogators, for the monopulse secondary surveillance radar to provide real-time passive detection of ADS-B-equipped aircraft and active radar detection of aircraft to each of the pair of redundant four-channel interrogators.